PowerPC 740 and PowerPC 750 Microprocessor Datasheet - IBM

PowerPC 740 and PowerPC 750 MicroprocessorCMOS 0.20 µm Copper Technology, PID-8p, PPC740L and PPC750L, dd3.2Errata SummaryFor errata details, see the PowerPC 750-PID 8p Microprocessor Errata List# Problem Description Impact Solution(s) Applies toVersion 3.21 L2 cache invalidate mayfail with DPM enabled.3 dcbz that hits in L1cache may not retrysnoop.5 Segment registerupdates may corruptdata translation.8(Advisory)Stfd of uninitialized FPRcan hang part.11 Thermal Assist Unit(TAU) accuracy specificationerror in dd3.2DatasheetIf DPM is enabled during aglobal invalidate of the L2cache, the global invalidatemay not invalidate allthe L2’s tags.If a dcbz hits in the L1cache, a snoop receivedat the same time to thataddress may not be servicedor get retried.mtsr followed by aninstruction causing a pagedata address translationcan cause contention forthe segment registers.A stfd will hang the part ifits source FPR has poweredup in a certain state.Actual TAU errors are differentthan those specificed.Possible system failure afterL2 initialization and start-up.Stale data from systemmemory may be read by theother bus master, and theline may become valid inmultiple caches.Possible access to incorrectreal address locations orfalse translation and dataaccess exceptions.Any system using a stfd.If TAU reads higher thanexpected, false temperaturealarms can occur.If TAU reads lower thanexpected, it can fail to signala temperature alarm.Turn DPM off during aL2 tag invalidate.Limit use of dcbz todata that is protectedthrough software synchronization.Insert isync, sc, or rfibetween andy mtsrand instructions thatcause a page dataaddress translation.Initialize all FPRs atPOR.Re-evaluate systemthermal design requirementsand calibrate theTAU.YesYesYesYesYes9/6/2002 Version 2.0 Page 44