PIC18F to PIC24F Migration: An Overview - Microchip

PIC24F PERIPHERAL SETI/O PortsPIC24F ports are very similar to PIC18F but have noteworthydifferences. Both devices have data PORT, LATand TRIS registers. Both analog and digital peripheralsare multiplexed onto ports. Ports on the PIC24F featuremore pins on more ports that have configurableopen-drain and interrupt-on-change (CNx) inputoptions.TABLE 18:COMPARISON BETWEEN PIC18F AND PIC24F PORT FEATURESFeature Description PIC18F PIC24FVoltage Inputs Above VDD + 0.3V Permitted No Digital-only pinsPull-up Option PORTB (all pins) Multiple pins, individuallyselectableInterrupt-on-Change PORTB (3 pins) Multiple pins, individuallyselectableControl Registers PORTx, LATx and TRISx PORTx, LATx, TRISxand ODCxConfigured to Inputs on Reset Yes YesFor both architectures, pins configured as analoginputs are read as ‘0’ when the associated PORTx bitis read by the CPU and the output driver is disabled.This prevents shoot-through current in the port outputdriver.Reading the PORTx register will return the digitalrepresentation of the pin voltage. This value will reflectan override from either a peripheral or external pinvoltage.Peripherals with digital outputs require the TRISx bit tobe cleared in software. While the peripheral is enabled,the pin output can be read with the PORTx register.Enabling the peripheral may affect the output’s slewrate and/or drive strength. Peripherals with the ability totri-state the output will override the TRISx register,although the change will not affect the TRISx registervalue. Refer to the product data sheet for moreinformation on peripheral outputs.Bidirectional peripherals can override the port outputbut not the input. Setting the TRISx bit to ‘1’ allows theperipheral to control the data direction. Reading thePORTx register will provide the port levels. The outputmay be affected by the peripheral’s slew rate or drivestrength overrides.Reading the PORTx register will read the digital representationof the voltages on the pins. Reading the LATxregister, reads the latched output value. Writing thePORTx register or the LATx register will write the LATxregister.On all Resets, the TRISx bits are set, causing the portsto configure as inputs and, where possible, analoginputs. This minimizes the pin load onto the applicationand the potential for shoot-through current in the digitalport inputs.© 2006 Microchip Technology Inc. DS39764A-page 27