TMS320F206 Digital Signal Processor (Rev. A) - Futurlec

More documents

Recommendations

Info

<strong>TMS320F206</strong>DIGITAL SIGNAL PROCESSORSPRS050A – NOVEMBER 1996 – REVISED APRIL 1998MEMORY AND PERIPHERAL INTERFACE TIMING (CONTINUED)CLKOUT1td(COL –A)th(COL-A)RDA0 –A15td(CO –RD)tsu(A-RD)th(AIV-D)td(CO –RD)tw(RDL)th(RD-A)RDta(A)ta(RD)th(RD-D)tw(RDH)tsu(D-RD)tsu(D–COL)RDth(COL-D)RDD0 –D15(data in)R/Wtd(COL –S)STRBFigure 9. Memory Interface Read Timing44 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
<strong>TMS320F206</strong>DIGITAL SIGNAL PROCESSORSPRS050A – NOVEMBER 1996 – REVISED APRIL 1998MEMORY AND PERIPHERAL INTERFACE TIMING (CONTINUED)memory and parallel I/O interface write timingA15–A0, PS, DS, IS, R/W, and BR timings are all included in the timings referenced to A15–A0 except whenin transition between a read operation following a write operation or a write operation following a read operation,where PS, DS, and IS pulse high [see t w(MS) ].switching characteristics over recommended operating conditions (see Figure 10) [H = 0.5t c(CO) ]PARAMETER’320F206-40MIN MAXUNITtsu(A-W) Setup time, address valid before WE low H – 7 nsth(W-A) Hold time, address valid after WE high H – 10 nstsu(A-COL) Setup time, write address valid before CLKOUT1 low H – 9 nsth(COL-A)W Hold time, write address valid after CLKOUT1 low H – 5 nstw(MS) Pulse duration, IS, DS, PS inactive high† H – 9 nstw(WL) Pulse duration, WE low (no wait states) 2H – 5 2H nstw(WH) Pulse duration, WE high 2H – 4 nstd(COL-W) Delay time, CLKOUT1 low to WE low / high – 2 4 nstd(RD-W) Delay time, RD high to WE low 2H – 8 nstd(W-RD) Delay time, WE high to RD low 3H – 8 nstsu(D-W) Setup time, write data valid before WE high 2H – 16 2H† nsth(W-D) Hold time, write data valid after WE high 3 14‡ nstsu(D-COL)W Setup time, write data valid before CLKOUT1 low 2H – 17 2H† nsth(COL-D)W Hold time, write data valid after CLKOUT1 low 2 14‡ nsten(D-W) Enable time, data bus driven from WE† 3 ns† Values specified from characterization data and not tested‡ Values specified from design data and not testedPOST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–144345
Page 1 and 2: TMS320F206DIGITAL SIGNAL PROCESSORS
Page 3 and 4: TMS320F206DIGITAL SIGNAL PROCESSORD
Page 5 and 6: TMS320F206DIGITAL SIGNAL PROCESSORT
Page 29 and 30: TMS320F206DIGITAL SIGNAL PROCESSORi
Page 37 and 38: TMS320F206DIGITAL SIGNAL PROCESSORP
Page 39 and 40: TMS320F206DIGITAL SIGNAL PROCESSORP
Page 41 and 42: TMS320F206DIGITAL SIGNAL PROCESSORt
Page 43: TMS320F206DIGITAL SIGNAL PROCESSORM
Page 57 and 58: PACKAGE OPTION ADDENDUMwww.ti.com30

TMS320F206 Digital Signal Processor (Rev. A) - Futurlec

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?