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Xilinx UG075 Virtex-4 FPGA Packaging and Pinout Specification ...

Xilinx UG075 Virtex-4 FPGA Packaging and Pinout Specification ...

Xilinx UG075 Virtex-4 FPGA Packaging and Pinout Specification ...

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RSF363 Flip-Chip Fine-Pitch BGA PackageTable 2-1: SF363 Package — LX15, LX25, <strong>and</strong> FX12 Devices (Continued)Bank Pin Description Pin NumberN/A GND Y1N/A GND A2N/A GND Y2N/A GND G3N/A GND P3N/A GND C7N/A GND H7N/A GND J7N/A GND K7N/A GND L7N/A GND M7N/A GND N7N/A GND V7N/A GND G8N/A GND P8N/A GND G9N/A GND P9N/A GND G10N/A GND P10N/A GND U10N/A GND D11N/A GND G11N/A GND P11N/A GND G12N/A GND P12N/A GND G13N/A GND P13N/A GND C14N/A GND H14N/A GND J14N/A GND K14N/A GND L14N/A GND M14N/A GND N14N/A GND V14N/A GND G18No Connectsin LX15 <strong>and</strong> FX12 Devices<strong>Virtex</strong>-4 <strong>FPGA</strong> <strong>Packaging</strong> <strong>and</strong> <strong>Pinout</strong> <strong>Specification</strong> www.xilinx.com 29<strong>UG075</strong> (v3.3) September 19, 2008

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