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Xilinx UG075 Virtex-4 FPGA Packaging and Pinout Specification ...

Xilinx UG075 Virtex-4 FPGA Packaging and Pinout Specification ...

Xilinx UG075 Virtex-4 FPGA Packaging and Pinout Specification ...

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RFF668 Flip-Chip Fine-Pitch BGA PackageTable 2-2: FF668 Package — LX15, LX25, LX40, LX60, SX25, SX35, <strong>and</strong> FX12Devices (Continued)Bank Pin Description Pin Number7 IO_L9P_CC_LC_7 AC257 IO_L9N_CC_LC_7 AC267 IO_L10P_7 AB267 IO_L10N_7 AA267 IO_L11P_7 AD257 IO_L11N_7 AD267 IO_L12P_7 Y227 IO_L12N_VREF_7 Y237 IO_L13P_7 AC227 IO_L13N_7 AB227 IO_L14P_7 AB237 IO_L14N_7 AA237 IO_L15P_7 AD227 IO_L15N_7 AD237 IO_L16P_7 AC237 IO_L16N_7 AC24No Connects inLX15, SX25, <strong>and</strong> FX12 Devices8 IO_L25P_CC_LC_8 AF88 IO_L25N_CC_LC_8 AF78 IO_L26P_8 AA88 IO_L26N_8 Y88 IO_L27P_8 Y108 IO_L27N_8 AA108 IO_L28P_8 AC78 IO_L28N_VREF_8 AB78 IO_L29P_8 AC98 IO_L29N_8 AB98 IO_L30P_8 AE68 IO_L30N_8 AD68 IO_L31P_8 AF98 IO_L31N_8 AE98 IO_L32P_8 AD88 IO_L32N_8 AC88 IO_L17P_8 AF48 IO_L17N_8 AE48 IO_L18P_8 AD3<strong>Virtex</strong>-4 <strong>FPGA</strong> <strong>Packaging</strong> <strong>and</strong> <strong>Pinout</strong> <strong>Specification</strong> www.xilinx.com 39<strong>UG075</strong> (v3.3) September 19, 2008

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