Xilinx UG075 Virtex-4 FPGA Packaging and Pinout Specification ...

RFF668 Flip-Chip Fine-Pitch BGA PackageFF668 Flip-Chip Fine-Pitch BGA PackageAs shown in Table 2-2, the following Virtex-4 LX and SX devices are available in the FF668flip-chip fine-pitch BGA package:• XC4VLX15• XC4VLX25• XC4VLX40• XC4VLX60• XC4VSX25• XC4VSX35• XC4VFX12Pinouts in the following devices are identical:• LX15, SX25, and FX12• LX25, LX40, LX60, and SX35The “No Connect” column in Table 2-2 shows pins that are not available in LX15, SX25,and FX12 devices.To be assured of having the very latest Virtex-4 FPGA pinout information, visitwww.xilinx.com and check for any updates to this document. ASCII package pinout filesare also available for download from the Xilinx website.Table 2-2: FF668 Package — LX15, LX25, LX40, LX60, SX25, SX35, and FX12DevicesBank Pin Description Pin Number0 HSWAPEN_0 G160 CCLK_0 G140 D_IN_0 G120 PROG_B_0 H150 INIT_B_0 G150 CS_B_0 G110 DONE_0 H140 RDWR_B_0 H120 VBATT_0 Y160 M2_0 W140 PWRDWN_B_0 W130 TMS_0 Y110 M0_0 W150 TDO_0 Y130 TCK_0 W12No Connects inLX15, SX25, and FX12 DevicesVirtex-4 FPGA Packaging and Pinout Specification www.xilinx.com 31UG075 (v3.3) September 19, 2008