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Xilinx UG075 Virtex-4 FPGA Packaging and Pinout Specification ...

Xilinx UG075 Virtex-4 FPGA Packaging and Pinout Specification ...

Xilinx UG075 Virtex-4 FPGA Packaging and Pinout Specification ...

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RFF668 Flip-Chip Fine-Pitch BGA PackageTable 2-2: FF668 Package — LX15, LX25, LX40, LX60, SX25, SX35, <strong>and</strong> FX12Devices (Continued)Bank Pin Description Pin Number6 IO_L13N_6 B96 IO_L14P_6 A36 IO_L14N_6 B36 IO_L15P_6 A46 IO_L15N_6 B46 IO_L16P_6 C46 IO_L16N_6 D46 IO_L25P_CC_LC_6 D26 IO_L25N_CC_LC_6 D16 IO_L26P_6 E16 IO_L26N_6 F16 IO_L27P_6 F46 IO_L27N_6 F36 IO_L28P_6 G46 IO_L28N_VREF_6 G36 IO_L29P_6 H66 IO_L29N_6 H56 IO_L30P_6 G26 IO_L30N_6 G16 IO_L31P_6 H46 IO_L31N_6 H36 IO_L32P_6 H26 IO_L32N_6 H1No Connects inLX15, SX25, <strong>and</strong> FX12 Devices7 IO_L25P_CC_SM7_LC_7 AD197 IO_L25N_CC_SM7_LC_7 AC197 IO_L26P_SM6_7 AA197 IO_L26N_SM6_7 AA207 IO_L27P_SM5_7 Y177 IO_L27N_SM5_7 AA177 IO_L28P_7 AB207 IO_L28N_VREF_7 AC207 IO_L29P_SM4_7 AC187 IO_L29N_SM4_7 AB187 IO_L30P_SM3_7 AF217 IO_L30N_SM3_7 AF22<strong>Virtex</strong>-4 <strong>FPGA</strong> <strong>Packaging</strong> <strong>and</strong> <strong>Pinout</strong> <strong>Specification</strong> www.xilinx.com 37<strong>UG075</strong> (v3.3) September 19, 2008

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