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Xilinx UG075 Virtex-4 FPGA Packaging and Pinout Specification ...

Xilinx UG075 Virtex-4 FPGA Packaging and Pinout Specification ...

Xilinx UG075 Virtex-4 FPGA Packaging and Pinout Specification ...

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RFF668 Flip-Chip Fine-Pitch BGA PackageTable 2-2: FF668 Package — LX15, LX25, LX40, LX60, SX25, SX35, <strong>and</strong> FX12Devices (Continued)Bank Pin Description Pin Number2 VCCO_2 AB112 VCCO_2 AB163 VCCO_3 B113 VCCO_3 B164 VCCO_4 AE114 VCCO_4 AD155 VCCO_5 H185 VCCO_5 B195 VCCO_5 E195 VCCO_5 H195 VCCO_5 J195 VCCO_5 B225 VCCO_5 F225 VCCO_5 F256 VCCO_6 F26 VCCO_6 B56 VCCO_6 F56 VCCO_6 B86 VCCO_6 E86 VCCO_6 J86 VCCO_6 H96 VCCO_6 H107 VCCO_7 W177 VCCO_7 W187 VCCO_7 V197 VCCO_7 AB197 VCCO_7 AE197 VCCO_7 AA227 VCCO_7 AE227 VCCO_7 AA258 VCCO_8 AA28 VCCO_8 AA58 VCCO_8 AE58 VCCO_8 V88 VCCO_8 W88 VCCO_8 AB8No Connects inLX15, SX25, <strong>and</strong> FX12 Devices<strong>Virtex</strong>-4 <strong>FPGA</strong> <strong>Packaging</strong> <strong>and</strong> <strong>Pinout</strong> <strong>Specification</strong> www.xilinx.com 45<strong>UG075</strong> (v3.3) September 19, 2008

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