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System Architecture Design

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pSHIELD<strong>System</strong> <strong>Architecture</strong> <strong>Design</strong>PUThis observation is of significant importance, since cryptography is widely used as a major building blockfor security; if cryptographic algorithms can be driven insecure, the whole construction collapses.In the following, we present the classes of side-channel attacks and countermeasures that have beendeveloped. Embedded system vendors must study the attacks carefully, evaluate the associated risks fortheir environment, and ensure that appropriate countermeasures are implemented in their systems;furthermore, they must be prepared to adapt promptly to new techniques for deriving secrets from theirsystems.4.2.3.3 Side channel implementationsA side channel is any physical channel that can carry information from the operation of a device whileimplementing a cryptographic operation; such channels are not captured by the existing abstractmathematical models. The definition is quite broad and the inventiveness of attackers is noticeable.Timing differences, power consumption, electromagnetic emissions, acoustic noise and faults have beencurrently exploited for leaking information out of cryptographic systems. The channel realization can becategorized in three broad classes: physical or probing attacks, fault-induction or glitch attacks andemission attacks, like TEMPEST. We shortly review the first two classes:The side channels may seem unavoidable and a frightening threat. However, it should be stronglyemphasized that in most cases, reported attacks, both theoretical and practical, rely for their success onthe detailed knowledge of the platform under attack and the specific implementation of the cryptographicalgorithm.4.2.3.3.1 Fault induction techniquesDevices are always susceptible to erroneous computations or other kinds of faults for several reasons.Faulty computations are a known issue from space systems, because, in deep space, devices areexposed to radiation which can cause temporary or permanent bit flips, gate destruction, or otherproblems. Incomplete testing during manufacturing may allow imperfect designs from reaching the marketor in the case of device operation in conditions out of their specifications. Careful manipulation of thepower supply or the clock oscillator can also cause glitches in code execution by tricking the processor forexample to execute unknown instructions or bypass a control statement. Some researchers havequestioned the feasibility of fault-injection attacks on real systems. While fault injection may seem as anapproach that requires expensive and specialized equipment, there have been reports that fault injectioncan be achieved with low cost and readily available equipment.The combined time-space isolation problem is of significant importance in fault-induction attacks. Thespace isolation problem refers to isolation of the appropriate space (area) of the chip in which to introducethe fault. The space isolation problem has four parameters:• Macroscopic: the part of the chip where the fault can be injected. Possible answers can be one ormore of the following: main memory, address bus, system bus, register file• Bandwidth: the number of bits that can be affected. It may be possible to change just one bit ormultiple bits at once. The exact number of changed bits can be controllable (e.g., one) or follow arandom distribution• Granularity: the area where can the error occur. The attacker may drive the fault injection positionat a bit level or a wider area, such as a byte or a multi-byte area. The fault injected area can becovered by a single error or by multiple errors. How are these errors distributed with respect to thearea? They may focus around the mark or evenly distributed• Lifetime: the time duration of the fault. It may be a transient fault or a permanent fault. Forexample, a power glitch may cause a transient fault at a memory location, since the next time thelocation will be written, a new value will be correctly written. In contrast, a cell or gate destructionwill result in a permanent error, since the output bit will be stuck at 0 or 1, independently of theinputPUD2.3.2Issue 5 Page 57 of 122

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