Xilinx Partial Reconfiguration User Guide

Chapter 3: Software Tools FlowThis correctly takes the Partition Pin delay into account. A global OFFSET OUT that couldapply:OFFSET = OUT 5 ns AFTER “clk”;Optionally, a Partition Pin can be physically locked to a site within the area_group rangeof the RP. This is not required, as they are placed automatically by the PR software, but canbe done to gain an additional level of control in the implementation results. Thismethodology should be used as a last resort, and only after automatic placement, withtiming constraints, has been explored. The following UCF command physically locks thePartition Pin to a site:PIN “RP_A.1” LOC = SLICE_X4Y4;Timing Constraints for the ICAPIf the Internal Configuration Access Port (ICAP) is used as the configuration port forpartially reconfiguring the FPGA, timing constraints can be very useful to understand thepotential performance of this interface.Virtex-6 ICAP Timing ConstraintsIn Virtex-6 FPGAs, the ICAP is modeled as a synchronous component in TRACE. Thismeans that PERIOD, FROM:TO, and all group based constraints will correctly cover pathsto and from the ICAP site. No additional constraints are required, as long as the ICAPcomponent is added to the applicable time groups.Virtex-5 and Virtex-4 ICAP Timing ConstraintsFor Virtex-5 and Virtex-4 FPGAs, it is important to understand that the paths to the ICAPand from the ICAP are not covered by PERIOD constraints. The ICAP inputs and outputsare not considered synchronous by TRACE. This is also true for the BUSY, CE, and WRITEsignals. This means that the inputs to and the outputs from the ICAP must be constrainedusing the exception constraint: NET MAXDELAY.Using NET MAXDELAY constraints, the syntax looks like this:NET “to_icap” MAXDELAY = 15 ns;NET “from_icap” MAXDELAY = 15 ns;NET “busy_from_icap” MAXDELAY = 15 ns;NET “write_to_icap” MAXDELAY = 15 ns;NET “ce_to_icap” MAXDELAY = 15 ns;In this example, the to_icap and from_icap networks are buses of any width. Theasterisk represents the entire bus (that is, 0, 1, 2, …). The NET MAXDELAY constraintconstrains only the net delay. It does not take the setup time or clock-to-out time intoconsideration.The ICAP component cannot be added to time groups because it is not considered asynchronous element. Therefore, the ICAP cannot be made a synchronous component byuse of a TPSYNC constraint. The ICAP component is a special type of component and mustgiven special consideration for timing when it is used in a design.32 www.xilinx.com Partial Reconfiguration User GuideUG702 (v13.1) March 1, 2011