DESIGN, ASSEMBLY AND CHARACTERIZATION OF COMPOSITE ...

modify the sintering kinetics of the Ni(m) ink, so that co-sintering of BT and Ni(m) may
be accomplished at a higher Ni volume fraction than the BT:Ni=4:1 composition. The
evolution of the NiO during sintering process is not studied in detail, but it is likely that
the NiO will be reduced to metal state eventually. However, this method is not considered
a repeatable standard procedure, and frequently hard to control due to process variables
involved. Thus, it is not described in the experimental section.
Figure 5.10a shows composite lattices assembled with pure BT ink and
BT:Ni=2:3 Ni(m) ink using Ø250 µm nozzle and annealed at 800 °C for 24 hours in N2.
The layered pattern is designed such that interleaved layers of BT and Ni(m) form a
structure similar to a multilayer capacitor. That is, the Ni(m) layers are alternately
terminated to form electrodes. The BT:Ni=2:3 Ni(m) rods appear gray in color, whereas
the BT rods are cream colored. The center sample has been demarcated with a numerical
scheme along the bottom edge. Here, regions 1 represent the termination ends of the
multilayer structure. Region 2 denotes the extension of one set of electrodes to the
terminations. And, region 3 represents the active area of the multilayer structure where
layers of dielectric are sandwiched between oppositely charged electrodes. The electrode
scheme is more clearly demonstrated with the cross-section of Figure 5.10b. In this figure,
the open, 3D lattice nature of the structure is apparent. The top numbers correspond with
the regions demarcated in Figure 5.10a, whereas the left-hand side labels denote the
various anode (a1, a2, etc.), dielectric (d1, d2, etc.), and cathode (c1, c2, etc.) layers. In
this picture, the terminal end is connected to the anode layers.
The intersections created by overlapping rods from adjacent anode, dielectric, and
cathode layers form an array of parallel connected capacitors for each dielectric layer.
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