DATA SHEET - IEETA

Philips Semiconductors Product specification
8-bit microcontroller with on-chip CAN P8xC592
Table 91 External clock drive XTAL1
SYMBOL PARAMETER
VARIABLE CLOCK
(fCLK = 1.2 to 16 MHz) UNIT
MIN. MAX.
tCLK oscillator clock period (P83C592) 62.5 833.3 ns
tHIGH HIGH time 20 tCLK − tLOW ns
tLOW LOW time 20 tCLK − tHIGH ns
tr rise time − 20 ns
tf fall time − 20 ns
tCY cycle time (12 × tCLK) 0.75 10 μs
Table 92 UART Timing in Shift Register Mode
SYMBOL PARAMETER
1996 Jun 27 90
fCLK
16 MHz 12 MHz VARIABLE CLOCK
MIN. MAX. MIN. MAX. MIN. MAX.
tXLXL Serial Port clock cycle timing 0.75 − 1.0 − 12tCLK − ms
tQVXH output data setup to clock rising edge 492 − 700 − 10tCLK − 133 − ns
tXHQX output data hold after clock rising edge 8.0 − 50 − 2tCLK − 117 − ns
tXHDX input data hold after clock rising edge 0 − 0 − 0 − ns
tXHDV clock rising edge to input data valid − 492 − 700 − 10tCLK − 133 ns
andbook, full INSTRUCTION
pagewidth
ALE
CLOCK
OUTPUT DATA
WRITE TO SBUF
INPUT DATA
CLEAR RI
0
1
t QVXH
t XLXL
2
t XHQX
t XHDV
3
t XHDX
VALID VALID VALID VALID VALID VALID VALID VALID
Fig.35 UART waveforms in Shift Register Mode.
4
5
6
7
MGA179
8
SET TI
SET RI
UNIT