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Philips Semiconductors Product specification 8-bit microcontroller with on-chip CAN P8xC592 Table 91 External clock drive XTAL1 SYMBOL PARAMETER VARIABLE CLOCK (fCLK = 1.2 to 16 MHz) UNIT MIN. MAX. tCLK oscillator clock period (P83C592) 62.5 833.3 ns tHIGH HIGH time 20 tCLK − tLOW ns tLOW LOW time 20 tCLK − tHIGH ns tr rise time − 20 ns tf fall time − 20 ns tCY cycle time (12 × tCLK) 0.75 10 μs Table 92 UART Timing in Shift Register Mode SYMBOL PARAMETER 1996 Jun 27 90 fCLK 16 MHz 12 MHz VARIABLE CLOCK MIN. MAX. MIN. MAX. MIN. MAX. tXLXL Serial Port clock cycle timing 0.75 − 1.0 − 12tCLK − ms tQVXH output data setup to clock rising edge 492 − 700 − 10tCLK − 133 − ns tXHQX output data hold after clock rising edge 8.0 − 50 − 2tCLK − 117 − ns tXHDX input data hold after clock rising edge 0 − 0 − 0 − ns tXHDV clock rising edge to input data valid − 492 − 700 − 10tCLK − 133 ns andbook, full INSTRUCTION pagewidth ALE CLOCK OUTPUT DATA WRITE TO SBUF INPUT DATA CLEAR RI 0 1 t QVXH t XLXL 2 t XHQX t XHDV 3 t XHDX VALID VALID VALID VALID VALID VALID VALID VALID Fig.35 UART waveforms in Shift Register Mode. 4 5 6 7 MGA179 8 SET TI SET RI UNIT
Philips Semiconductors Product specification 8-bit microcontroller with on-chip CAN P8xC592 22 CAN APPLICATION INFORMATION 22.1 Latency time requirements Real-time applications require the ability to process and transfer information in a limited and predetermined period of time. If knowing this total time and the time required to process the information, the (maximum allowed) transfer delay time is given. 22.1.1 MAXIMUM ALLOWED BIT-TIME CALCULATION 1996 Jun 27 91 It is measured from the initiation of the transfer up to the signalling of reception. For instance, this is the period of time between programming the CAN Command Register bit 0 (Transmission Request) to HIGH and the time getting an interrupt at a receiving CAN-device (due to the reception of the respective message). The maximum allowed bit-time (tBIT) due to latency time requirements can be calculated as: tBIT ≤ -------------------------------------------------------------------------------------------- ( nBIT, MAX LATENCY + nBIT, MESSAGE) Where: • tMAX TRANSFER TIME: the maximum allowed transfer delay time (application-specific). • nBIT, MAX LATENCY: the maximum latency time (in terms of number of bits), which depends on the actual state of the CAN network (e.g. another message already on the network); • nBIT, MESSAGE: the number of bits of a message; it varies with the number of transferred data bytes nDATA BYTES (0..8) and Stuffbits like: Example: For the calculation of nBIT, MAX LATENCY the following is assumed (the term ‘our message’ refers to that one the latency time is calculated for): • since at maximum one-bit-time ago another CAN-controller is transmitting. • a single error occurs during the transmission of that message preceding ours, leading to the additional transfer of one Error Frame • ‘our message’ has the highest priority, giving: t MAX TRANSFER TIME 44 + 8.nDATA BYTES ≤nBIT, MESSAGE ≤52 + 10.nDATABYTES nBIT, MAX LATENCY ≥44 + 8.nDATA BYTES, WORST CASE + 18 nBIT, MAX LATENCY ≤52 + 10.nDATA BYTES, WORST CASE + 18 Where: • The additional 18 bits are due to the Error Frame and the Intermission Field preceding ‘our message’. • nDATA BYTES, WORST CASE denotes the number of data bytes contained by the longest message being used in a given CAN network. (1) (2) (3) (4)
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