SMSC LPC47N252 Data Sheet - Keil

3.1 DESCRIPTION OF PIN FUNCTIONS
Device functions per pin are shown in Table 2. Buffer Modes symbols in Table 2 are described in
Table 3. Multifunction pins are summarized in Table 4, including a multiplex controls reference.
The pins and descriptions in Table 2 are organized by primary pin function. For example, the PS2 Serial Clock and
PS2 Serial Data pins are technically part of the KEYBOARD AND MOUSE INTERFACE but are listed in the
GENERAL PURPOSE I/O INTERFACE because the GPIO function of these pins is the default.
Table 2 - Pin Function Description
TQFP
PIN NOTES NAME DESCRIPTION
FDD INTERFACE (15)
POWER
PLANE BUFFER
MODES 2
4 Note 14 DRVDEN0 Drive Density Select 0 VCC2 (O12/OD12)
5 Note 14 DRVDEN1 Drive Density Select 1 VCC2 (O12/OD12)
6 Note 14 nMTR0 Motor On 0 VCC2 (O12/OD12)
8 Note 14 nDS0 Drive Select 0 VCC2 (O12/OD12)
9 Note 14 nDIR Step Direction VCC2 (O12/OD12)
10 Note 14 nSTEP Step Pulse VCC2 (O12/OD12)
11 Note 14 nWDATA Write Disk Data VCC2 (O12/OD12)
12 Note 14 nWGATE Write Gate VCC2 (O12/OD12)
13 Note 14 nHDSEL Head Select VCC2 (O12/OD12)
14 nINDEX Index Pulse Input VCC2 IS
15 nTRK0 Track 0 VCC2 IS
16 nWRTPRT Write Protected VCC2 IS
17 nRDATA Read Disk Data VCC2 IS
18 nDSKCHG Disk Change VCC2 IS
19 FPD Floppy Power Down Output Control VCC2 O8
PCI POWER MANAGEMENT AND SIRQ INTERFACE (4)
106 Note 7 nEC_SCI Power Management Event 7
VCC1 PCI_OD
99 PCI_CLK PCI Clock VCC2 PCI_ICLK
101 SER_IRQ Serial IRQ VCC2 PCI_IO
100 nCLKRUN PCI Clock Control VCC2 PCI_OD
LPC BUS (8)
95: 92 Note 17 LAD[3:0] LPC address/data bus. Multiplexed command, address
and data bus.
VCC2 PCI_IO
96 LDRQ# Encoded DMA request for the LPC interface. VCC2 PCI_O
91 LPCPD# Powerdown Signal. Indicates that the Kahuna should
prepare for power to be shut on the LPC interface. Used
as LPC powergood
97 LFRAME# Frame signal. Indicates start of new cycle and termination
of broken cycle
98 Note 15
Note 16
36:30, 28:24 Note 13 KSO[0:11]/
ATE Prog.
Access/
Ext. Flash
23 KSO12
OUT8/
KBRST
22 Note 11 KSO13/
GPIO18
LRESET# LPC Reset. LRESET# is the same as the system PCI
reset, PCIRST#
KEYBOARD AND MOUSE INTERFACE (28)
Keyboard Scan Outputs (14 × 8).
NOTE: GPIO4 and GPIO5 can be configured as KSO14
and KSO15 (16 × 8).
Keyboard Scan Output
General Purpose Output
CPU_RESET 3
Keyboard Scan Output
General Purpose I/O
VCC2 PCI_I
VCC2 PCI_I
VCC2 PCI_I
VCC1 OD4/IO4/IO4
VCC1 OD4/OD4/OD4
VCC1 IOD4/IOD4
SMSC DS – LPC47N252 Page 16 Rev. 09/06/2000