PDF (Thesis) - Nottingham eTheses - University of Nottingham
PDF (Thesis) - Nottingham eTheses - University of Nottingham
PDF (Thesis) - Nottingham eTheses - University of Nottingham
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APPENDIX B: EXTERNAL DLL<br />
m3dash = ( ( f l o a t )2/3)∗VoC/vin_peak2 ;<br />
m_31 = ( m3dash ∗ VA) + m1add ;<br />
m_32 = ( m3dash ∗ VB) + m2add ;<br />
/∗ m_33 = ( m3dash ∗ VC) + m3add ; ∗ /<br />
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Timings [ 4 ] = ( i n t ) ( Tseq_Pulses∗( m_31 ) ) ;<br />
Timings [ 5 ] = ( i n t ) ( Tseq_Pulses∗( m_31+m_32 ) ) ;<br />
T11 = ( double ) Timings [ 0 ] / FPGA_CLOCK;<br />
T12 = ( double ) Timings [ 1 ] / FPGA_CLOCK;<br />
T21 = ( double ) Timings [ 2 ] / FPGA_CLOCK;<br />
T22 = ( double ) Timings [ 3 ] / FPGA_CLOCK;<br />
T31 = ( double ) Timings [ 4 ] / FPGA_CLOCK;<br />
T32 = ( double ) Timings [ 5 ] / FPGA_CLOCK;<br />
Note: some calculations have been commented because not needed due to mathemati-<br />
cal considerations due to the modulation used, for example m11+ m12+ m13 = 1, hence<br />
the last term is not needed when the first two are known.<br />
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