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CHAPTER 2: EXPERIMENTAL IMPLEMENTATION OF MATRIX CONVERTER DRIVE
F
R
C1
C2
E
Figure 2.2: IGBT module used
this limit to a maximum of 86.6% by means of an injection to the common mode voltage
of the third harmonic [35]. This way the lobes of the input voltage envelope could be
fully used, as in Fig. 2.3b to generate the maximum output available for a given input
voltage, that corresponds to √ 3/2 of the input.
The new output target voltage becomes:
⎡
⎢ cos(ωot)−
⎢
[vo(t)] = qVi
⎢
⎣
1
1
cos(3ωot)+
6 2 √ 3 cos(3ωit)
cos(ωot− 2π/3)− 1
1
cos(3ωot)+
6 2 √ 3 cos(3ωit)
cos(ωot+ 2π/3)− 1
1
cos(3ωot)+
6 2 √ 3 cos(3ωit)
⎤
⎥
⎦
(2.2.9)
The new solution for the modulation indexes in formula 2.2.8 now becomes, in a com-
pact representation:
mKj = 1
3
1+ 2vKvj
V2 +
i
4q
3 √ 3 sin(ωit+ βK) sin(3ωit)
for K = A,B,C and j = a,b,c with βK=0, 2π/3, 4π/3 for K = A, B, C respectively
(2.2.10)
This is the formula implemented in the control algorithm that, starting from the mod-
ulation index q and the output angular frequency given by he V/f control in Fig. 2.9,
will generate the nine modulating indexes mij fed to the nine PWM generators inside
the FPGA. The output of each of these channels has a hardware state machine that, ac-
cordingly to the output current, will autonomously generate the correct timing for the
four-step commutation, without the need of overloading the control code to control
individually each of the 18 switches (2×9unidirectional switches, as in Fig. 2.2).
2.2.2 Commutation strategies
A general 3×3 three-phase Matrix converter system is composed of 9 switches, SAa to
SCc as in Fig. 2.1. This direct connection from input to output limits the possibility of
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