Handbook of Railway Vehicle Dynamics

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FIGURE 13.21 Aliasing due to insufficient sampling rate.
Handbook of Railway Vehicle Dynamics
The process of sampling and converting the signal leads to the possibility of two forms
of inaccuracy in the digitised signal, known as aliasing and quantisation errors.
Akey decision when setting up adata logging system is the sampling rate. This is the time
interval at which the logger takes a“snapshot” (sample) of the incoming analogue signal. If the
sampling rate is too low, ahigh frequency signal may appear incorrectly as alower one, as
illustrated in Figure 13.21.Although the aliasedfrequencyshownhere is one third the actual signal
frequency, awhole series of aliases are possible depending upon the sampling frequency chosen.
Theoretically,the chosen sampling rate should be at least twice the highest frequency(of interest) in
the sampled signal. However, in practice, it is normal to sample at between five and ten times the
highest frequencyrequiredinorder to ensuregood representation of amplitudeaswell as frequency.
An additional aliasing problem can arise if the sampledsignal is degraded by an unknown, high
frequency, noise component. Asampling rate of, say, ten times the highest frequency ofinterest,
could cause this noise to be aliased into the measurement frequency range giving incorrect results.
The solution in this case is to low pass filter the signal using ananalogue filter prior to sampling to
remove the unwanted component. This precaution is known asanti-alias filtering.
Quantisation errors are introduced by the ADC forcing acontinuous analogue signal into
alimited number of discrete levels (binary digits or “bits”). The error will be present in all digitised
signals and has the effect of restrictingthe dynamic range of the signal. Themagnitude of the error
will be proportional tothe resolution ofthe ADC. Quantisation errors are not generally aserious
restriction for modern data loggers. However, care should betaken to ensure that the full range of
the ADC is used. For example, consider an ADC using an 8-bit conversion, which allows 256
discrete states of the converted signal. If the ADC range is set to ^ 1V and a ^ 1V signal is
converted, the digitised signal will consist of 256 discrete values and will give a good
representation of the original analogue signal. However, if the same signal is passed through
with the ADC range set to ^ 10 V, the ^ 1Vsignal may only have 256/10 discrete values and
asignificant quantisation error results. It also follows, therefore, that the potential for quantisation
errors are larger when asignal has awide dynamic range.
Once the signal has been converted todigital format, further operations can be performed
easily, such as filtering, bias or offset removal, amplification, etc. Detailed discussion of digital
signal processing techniques is beyond the scope of this chapter, but numerous texts exist toguide
the interested reader.
Important considerations when selecting adata logger include:
† The number of transducers to be used in the test, and hence the number of channels
required by the data logger.
† The rate at which each transducer is to be sampled. Modern data loggers are generally
capable of sampling at very high frequencies (of the order of kHz), many times higher
than required for most railway vehicle dynamics applications. Many loggers allow
© 2006 by Taylor & Francis Group, LLC