Video and Image Processing Up Conversion Example Design
Video and Image Processing Up Conversion Example Design
Video and Image Processing Up Conversion Example Design
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Revision History<br />
Revision History Table 1 shows the revision history for the AN-427: <strong>Video</strong> <strong>and</strong> <strong>Image</strong><br />
<strong>Processing</strong> <strong>Up</strong> <strong>Conversion</strong> <strong>Example</strong> <strong>Design</strong> application note.<br />
Table 1. AN-427 Revision History<br />
Version Date Errata Summary<br />
4.0 October 2007 <strong>Up</strong>dated for Quartus version 7.2. The design now uses DSP Builder <strong>Video</strong> Source<br />
<strong>and</strong> <strong>Video</strong> Sink blocks <strong>and</strong> the triple buffer block has been replaced by a Frame<br />
Buffer MegaCore function. Removed obsolete troubleshooting issue “Compilation<br />
Fails in Analysis <strong>and</strong> Synthesis”.<br />
3.0 May 2007 <strong>Up</strong>dated for Quartus version 7.1.<br />
2.0 December 2006 <strong>Up</strong>dated for Quartus version 6.1.<br />
1.2 July 2006 Added troubleshooting issues “Compilation Fails in Analysis <strong>and</strong> Synthesis” <strong>and</strong><br />
“DDR2 Fails in Analysis <strong>and</strong> Synthesis or In Timing Analysis”.<br />
1.1 July 2006 <strong>Up</strong>dated algorithm used by the triple buffer block, effects of VGA starvation,<br />
description of the image stream frame counter block, <strong>and</strong> other minor edits.<br />
1.0 June 2006 First release of this application note.<br />
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