Video and Image Processing Up Conversion Example Design

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Video and Image Processing Up Conversion Example Design Figure 3. Multiple Video Channel Input System Composite Video Input (Interlaced) NTSC Interface Composite Video Input (Interlaced) NTSC Interface Deinterlacing Figure 3 shows a block diagram of a two video channel input system. Nios II Processor Chroma Resampling Avalon-ST data interface Avalon-MM control interface Color Space Conversion (YCbCr->RGB) Picture-in- Picture Mixing VGA Controller Note that the two triple buffer blocks perform frame synchronization for the two video streams. Other Video Interface Standards Gamma Correction External Memory Deinterlacing Chroma Color Space Gamma Resampling Conversion (YCbCr->RGB) Correction Video Output (VGA) Scaling Scaling 2D 5x5 FIR Filter (Sharpening) Triple Buffer Triple Buffer 2D 5x5 FIR Filter (Sharpening) The up conversion example design provides a framework to develop video systems with NTSC video input and VGA video output. This requires appropriate hardware ports on the DSP development board, analog to digital conversion and FPGA hardware interface components. However, a variety of different hardware interface standards and protocols are seen in applications throughout the broadcast, consumer, automotive, surveillance, medical and document imaging markets. 6 Altera Corporation Preliminary
Figure 4. System with Different Video Interface Standards SDI Video Source SDI Deinterlacing Chroma Resampling Possible Video System Configurations These interfaces include phase alternation line (PAL), digital video interface (DVI), high definition multimedia interface (HDMI), component or YCbCr (with separate luminance and chrominance signals), S-Video or Y/C (with separate luminance and color signals), serial digital interface (SDI) and high definition SDI (HD-SDI). The programmable nature of the FPGA lends itself well to migrating systems that support different interfaces. The example design could be used as a framework for development of such FPGA hardware interface components. This can be achieved by implementing SOPC Builder components with Avalon-ST interfaces as used in the example design. The DSP Builder tool also allows development and test of video processing data paths independent of FPGA hardware interface development. For example, you could develop a video system with SDI video input and output ports using the Stratix II GX board, and the Altera SDI/HD-SDI MegaCore function. Figure 4 shows a block diagram of a system with different video interface standards. Color Space Conversion (YCbCr->RGB) Avalon-ST data interface Avalon-MM control interface Scaling Triple Buffer External Memory SDI Video Altera Corporation 7 Preliminary SDI
Page 1 and 2: October 2007, ver 4.0 Introduction
Page 3 and 4: Installing the Example Design Insta
Page 5: Figure 2. Single Video Channel Inpu
Page 9 and 10: NTSC Video Input Figure 6. NTSC Vid
Page 11 and 12: Figure 8. Data Stream Adapter Block
Page 13 and 14: Functional Description The external
Page 15 and 16: Hardware Requirements System Requir
Page 17 and 18: Review and Simulate the Example Des
Page 19 and 20: Figure 14. Video Source Block Revie
Page 25 and 26: Figure 23. Chroma Resampler Block R
Page 33 and 34: Figure 35. Avalon-MM Master Interfa
Page 35 and 36: Review the System Integration Using
Page 41 and 42: Set Up the Hardware and Configure t
Page 43 and 44: Conclusion Conclusion The Video and
Page 45: 101 Innovation Drive San Jose, CA 9

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