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E0286 – VLSI Test VLSI Test

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Different Techniques Beyond Production <strong>Test</strong><br />

Techniques<br />

Technology: Cell hardening.<br />

Physical design rules.<br />

Margins: Additional design margins.<br />

Margin mode testing.<br />

DFT partitioning:<br />

Scan partitioning. Clock skewing / staggering. <strong>Test</strong> res.part. x x<br />

ATPG: Parametric tests. Defect based tests. Bus BIST. x x<br />

Power aware test.<br />

Power management: Power grid partitioning / over-design.<br />

Power isolation switches. Retention.<br />

x x<br />

x<br />

Device configurability:<br />

Pre-shipment calibration. Memory repair. Module isolation. x<br />

On-chip test / measurement:<br />

Self-test. Self-calibration. Self-repair. Adaptivity.<br />

Die test: Over-test. Stress test.<br />

Under-test. Binning. Adaptive test.<br />

System test:<br />

Field test. Periodic testing.<br />

Tolerance: Error checking and correction.<br />

Redundancy and reconfiguration.<br />

Yield Reliability Power<br />

x<br />

x<br />

x<br />

x<br />

x<br />

x<br />

x<br />

x<br />

x<br />

x<br />

x<br />

x<br />

x<br />

x<br />

x

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