E0286 â VLSI Test VLSI Test

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Generic Self-test Controller External host or interface Self-test microcode Internal memory (self-test config.) Read Master CPU DUT with scan compression + DUT addl. control BIST Write Status registers Possibilities: (i) One-time manufacturing test. (ii) Fixed time field test. (iii) Periodic field test. (iv) Online test concurrent with normal operation. Normal appl. time slot <strong>Test</strong> application A1 T1 A2 T2 A3 T3 A4
Scatter Plots – How to Distinguish between Good and Bad Normalized Fmax Process Spread Process spread
Page 1 and 2: E0286 - VLSI Test Background materi
Page 3 and 4: Cost of Test Test cost (% of total
Page 5 and 6: Technology and Failure Modes Test c
Page 7 and 8: Terminology (2) - Defect: This is t
Page 9 and 10: Interesting Test Data Reliability /
Page 11 and 12: Components of Test Cost Design cost
Page 13 and 14: Cost of Testing (2) Cw = Wafer cost
Page 15 and 16: Cost Tradeoffs - Example 2 Reduce t
Page 17 and 18: Apportioned Test Cost 700000 Cost 6
Page 19 and 20: Diverse Markets q Designs spec’ed
Page 21 and 22: Apportioned Quality Cost (2) 350000
Page 23 and 24: How Coverage Impacts Fall-out Rejec
Page 25 and 26: Impact of Non-zero DPPM Consider a
Page 27 and 28: IP Mixture in SOC H A C D E B F G C
Page 29: Test Data Volume Required to Test D
Page 33 and 34: Coverage Improvements Across Fault
Page 35 and 36: Cost versus Quality Tradeoffs Quali
Page 37 and 38: Test Components under Multi-site q
Page 39 and 40: Test Power Concerns Normalized Powe
Page 41 and 42: Four Quadrant Analysis II I Built-i
Page 43: Thank you.

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E0286 â VLSI Test VLSI Test