LTC2410 24-Bit No Latency âÎ£TM ADC with Differential Input and ...

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LTC2410TYPICAL PERFOR A CE CHARACTERISTICSSUPPLY CURRENT (µA)220210200190180170Conversion Current vsTemperature (T A )F O = GNDCS = GNDSCK = NCSDO = NC V CC = 5.5VV CC = 4.1VV CC = 2.7VU W160–45 –30 –15 0 15 30 45 60 75 90TEMPERATURE (°C)2410 G37SUPPLY CURRENT (µA)11001000900800700600500400300200Conversion Current vsOutput Data RateV CC = 5VREF + = 5VREF – = GNDIN + = GNDIN – = GNDT A = 25°CF O = EXTERNAL OSCCS = GNDSCK = NCSDO = NC1000 10 20 30 40 50 60 70 80 90 100OUTPUT DATA RATE (READINGS/SEC) 2410 G38SUPPLY CURRENT (µA)23222120191817Sleep Current vs Temperature (T A )F O = GNDCS = V CCSCK = NCSDO = NCV CC = 4.1VV CC = 5.5VV CC = 2.7V16–45 –30 –15 0 15 30 45 60 75 90TEMPERATURE (°C)2410 G39PI FU CTIO SU U UGND (Pins 1, 7, 8, 9, 10, 15, 16): Ground. Multiple groundpins internally connected for optimum ground current flowand V CC decoupling. Connect each one of these pins to aground plane through a low impedance connection. All sevenpins must be connected to ground for proper operation.V CC (Pin 2): Positive Supply Voltage. Bypass to GND(Pin␣ 1) with a 10µF tantalum capacitor in parallel with0.1µF ceramic capacitor as close to the part as possible.REF + (Pin 3), REF – (Pin 4): Differential Reference Input.The voltage on these pins can have any value between GNDand V CC as long as the reference positive input, REF + , ismaintained more positive than the reference negativeinput, REF – , by at least 0.1V.IN + (Pin 5), IN – (Pin 6): Differential Analog Input. Thevoltage on these pins can have any value betweenGND – 0.3V and V CC + 0.3V. Within these limits theconverter bipolar input range (V IN = IN + – IN – ) extendsfrom –0.5 • (V REF ) to 0.5 • (V REF ). Outside this input rangethe converter produces unique overrange and underrangeoutput codes.CS (Pin 11): Active LOW Digital Input. A LOW on this pinenables the SDO digital output and wakes up the ADC.Following each conversion the ADC automatically entersthe Sleep mode and remains in this low power state aslong as CS is HIGH. A LOW-to-HIGH transition on CSduring the Data Output transfer aborts the data transferand starts a new conversion.10SDO (Pin 12): Three-State Digital Output. During the DataOutput period, this pin is used as serial data output. Whenthe chip select CS is HIGH (CS = V CC ) the SDO pin is in ahigh impedance state. During the Conversion and Sleepperiods, this pin is used as the conversion status output.The conversion status can be observed by pulling CS LOW.SCK (Pin 13): Bidirectional Digital Clock Pin. In InternalSerial Clock Operation mode, SCK is used as digital outputfor the internal serial interface clock during the DataOutput period. In External Serial Clock Operation mode,SCK is used as digital input for the external serial interfaceclock during the Data Output period. A weak internal pullupis automatically activated in Internal Serial Clock Operationmode. The Serial Clock Operation mode is determinedby the logic level applied to the SCK pin at power upor during the most recent falling edge of CS.F O (Pin 14): Frequency Control Pin. Digital input thatcontrols the ADC’s notch frequencies and conversiontime. When the F O pin is connected to V CC (F O = V CC ), theconverter uses its internal oscillator and the digital filterfirst null is located at 50Hz. When the F O pin is connectedto GND (F O = OV), the converter uses its internal oscillatorand the digital filter first null is located at 60Hz. When F Ois driven by an external clock signal with a frequency f EOSC ,the converter uses this signal as its system clock and thedigital filter first null is located at a frequency f EOSC /2560.
LTC2410WFU CTIO AL BLOCK DIAGRAV CCU UINTERNALOSCILLATORGNDAUTOCALIBRATIONAND CONTROLF O(INT/EXT)IN +IN –+–∫∫∫∑ADCSERIALINTERFACESDOSCKREF +REF –DECIMATING FIRCS– +DACFigure 1. Functional Block Diagram2410 FDTEST CIRCUITSV CCSDO1.69kC LOAD = 20pFSDO1.69kC LOAD = 20pFHi-Z TO V OHV OL TO V OHV OH TO Hi-Z2410 TA03Hi-Z TO V OLV OH TO V OLV OL TO Hi-Z2410 TA04APPLICATIO S I FORCONVERTER OPERATIONATIOU W U UConverter Operation CycleThe LTC2410 is a low power, delta-sigma analog-todigitalconverter with an easy to use 3-wire serial interface(see Figure 1). Its operation is made up of three states. Theconverter operating cycle begins with the conversion,followed by the low power sleep state and ends with thedata output (see Figure 2). The 3-wire interface consistsof serial data output (SDO), serial clock (SCK) and chipselect (CS).Initially, the LTC2410 performs a conversion. Once theconversion is complete, the device enters the sleep state.While in this sleep state, power consumption is reduced byan order of magnitude. The part remains in the sleep stateas long as CS is HIGH. The conversion result is heldindefinitely in a static shift register while the converter isin the sleep state.FALSECONVERTSLEEPCS = LOWANDSCKTRUEDATA OUTPUT2410 F02Figure 2. LTC2410 State Transition Diagram11
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LTC2410 24-Bit No Latency âÎ£TM ADC with Differential Input and ...