LTC2410 24-Bit No Latency ∆ΣTM ADC with Differential Input and ...

LTC2410APPLICATIO S I FOR30ATIOU W U Uity. Typical measured performance curves for output datarates up to 100 readings per second are shown in Figures␣27, 28, 29, 30, 31, 32, 33 and 34. In order to obtainthe highest possible level of accuracy from this converterat output data rates above 20 readings per second, theuser is advised to maximize the power supply voltage usedand to limit the maximum ambient operating temperature.In certain circumstances, a reduction of the differentialreference voltage may be beneficial.Input BandwidthThe combined effect of the internal Sinc 4 digital filter andof the analog and digital autocalibration circuits determinesthe LTC2410 input bandwidth. When the internaloscillator is used with the notch set at 60Hz (F O = LOW),the 3dB input bandwidth is 3.63Hz. When the internaloscillator is used with the notch set at 50Hz (F O = HIGH),the 3dB input bandwidth is 3.02Hz. If an external conversionclock generator of frequency f EOSC is connected to theF O pin, the 3dB input bandwidth is 0.236 • 10 –6 • f EOSC .Due to the complex filtering and calibration algorithmsutilized, the converter input bandwidth is not modeled veryaccurately by a first order filter with the pole located at the3dB frequency. When the internal oscillator is used, theshape of the LTC2410 input bandwidth is shown in Figure␣35 for F O = LOW and F O = HIGH. When an externaloscillator of frequency f EOSC is used, the shape of theLTC2410 input bandwidth can be derived from Figure␣ 35,F O = LOW curve in which the horizontal axis is scaled byf EOSC /153600.The conversion noise (800nV RMS typical for V REF = 5V)can be modeled by a white noise source connected to anoise free converter. The noise spectral density is62.75nV√Hz for an infinite bandwidth source and86.1nV√Hz for a single 0.5MHz pole source. From thesenumbers, it is clear that particular attention must be givento the design of external amplification circuits. Suchcircuits face the simultaneous requirements of very lowbandwidth (just a few Hz) in order to reduce the outputreferred noise and relatively high bandwidth (at least500kHz) necessary to drive the input switched-capacitornetwork. A possible solution is a high gain, low bandwidthamplifier stage followed by a high bandwidth unity-gainbuffer.OFFSET ERROR (ppm OF V REF )5004504003503002502001501005000 10 20 30 40 50 60 70 80 90 100OUTPUT DATA RATE (READINGS/SEC)2410 F27Figure 27. Offset Error vs Output Data Rate and Temperature+FS ERROR (ppm OF VREF)V CC = 5VREF + = 5VREF – = GNDV INCM = 2.5VV IN = 0VF O = EXTERNAL OSCILLATORT A = 85°CT A = 25°C0 10 20 30 40 50 60 70 80 90 100OUTPUT DATA RATE (READINGS/SEC)Figure 28. +FS Error vs Output Data Rate and Temperature–FS ERROR (ppm OF V REF )700060005000400030002000100000–1000–2000–3000–4000–5000–6000–7000V CC = 5VREF + = 5VREF – = GNDIN + = 3.75VIN – = 1.25VF O = EXTERNAL OSCILLATORT A = 25°CT A = 85°CT A = 85°CT A = 25°CV CC = 5VREF + = 5VREF – = GNDIN + = 1.25VIN – = 3.75VF O = EXTERNAL OSCILLATOR2410 F280 10 20 30 40 50 60 70 80 90 100OUTPUT DATA RATE (READINGS/SEC)2410 F29Figure 29. –FS Error vs Output Data Rate and Temperature