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LTC2410 24-Bit No Latency ∆ΣTM ADC with Differential Input and ...

LTC2410 24-Bit No Latency ∆ΣTM ADC with Differential Input and ...

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TII G CHARACTERISTICSU W<strong>LTC<strong>24</strong>10</strong>The ● denotes specifications which apply over the full operating temperaturerange, otherwise specifications are at T A = 25°C. (<strong>No</strong>te 3)SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITSf EOSC External Oscillator Frequency Range ● 2.56 2000 kHzt HEO External Oscillator High Period ● 0.25 390 µst LEO External Oscillator Low Period ● 0.25 390 µst CONV Conversion Time F O = 0V ● 130.86 133.53 136.20 msF O = V CC ● 157.03 160.23 163.44 msExternal Oscillator (<strong>No</strong>te 11) ● 20510/f EOSC (in kHz) msf ISCK Internal SCK Frequency Internal Oscillator (<strong>No</strong>te 10) 19.2 kHzExternal Oscillator (<strong>No</strong>tes 10, 11) f EOSC /8 kHzD ISCK Internal SCK Duty Cycle (<strong>No</strong>te 10) ● 45 55 %f ESCK External SCK Frequency Range (<strong>No</strong>te 9) ● 2000 kHzt LESCK External SCK Low Period (<strong>No</strong>te 9) ● 250 nst HESCK External SCK High Period (<strong>No</strong>te 9) ● 250 nst DOUT_ISCK Internal SCK 32-<strong>Bit</strong> Data Output Time Internal Oscillator (<strong>No</strong>tes 10, 12) ● 1.64 1.67 1.70 msExternal Oscillator (<strong>No</strong>tes 10, 11) ● 256/f EOSC (in kHz) mst DOUT_ESCK External SCK 32-<strong>Bit</strong> Data Output Time (<strong>No</strong>te 9) ● 32/f ESCK (in kHz) mst 1 CS ↓ to SDO Low Z ● 0 200 nst2 CS ↑ to SDO High Z ● 0 200 nst3 CS ↓ to SCK ↓ (<strong>No</strong>te 10) ● 0 200 nst4 CS ↓ to SCK ↑ (<strong>No</strong>te 9) ● 50 nst KQMAX SCK ↓ to SDO Valid ● 220 nst KQMIN SDO Hold After SCK ↓ (<strong>No</strong>te 5) ● 15 nst 5 SCK Set-Up Before CS ↓ ● 50 nst 6 SCK Hold After CS ↓ ● 50 ns<strong>No</strong>te 1: Absolute Maximum Ratings are those values beyond which thelife of the device may be impaired.<strong>No</strong>te 2: All voltage values are <strong>with</strong> respect to GND.<strong>No</strong>te 3: V CC = 2.7 to 5.5V unless otherwise specified.V REF = REF + – REF – , V REFCM = (REF + + REF – )/2;V IN = IN + – IN – , V INCM = (IN + + IN – )/2.<strong>No</strong>te 4: F O pin tied to GND or to V CC or to external conversion clocksource <strong>with</strong> f EOSC = 153600Hz unless otherwise specified.<strong>No</strong>te 5: Guaranteed by design, not subject to test.<strong>No</strong>te 6: Integral nonlinearity is defined as the deviation of a code froma straight line passing through the actual endpoints of the transfercurve. The deviation is measured from the center of the quantizationb<strong>and</strong>.<strong>No</strong>te 7: F O = 0V (internal oscillator) or f EOSC = 153600Hz ±2%(external oscillator).<strong>No</strong>te 8: F O = V CC (internal oscillator) or f EOSC = 128000Hz ±2%(external oscillator).<strong>No</strong>te 9: The converter is in external SCK mode of operation such thatthe SCK pin is used as digital input. The frequency of the clock signaldriving SCK during the data output is f ESCK <strong>and</strong> is expressed in kHz.<strong>No</strong>te 10: The converter is in internal SCK mode of operation such thatthe SCK pin is used as digital output. In this mode of operation theSCK pin has a total equivalent load capacitance C LOAD = 20pF.<strong>No</strong>te 11: The external oscillator is connected to the F O pin. The externaloscillator frequency, f EOSC , is expressed in kHz.<strong>No</strong>te 12: The converter uses the internal oscillator.F O = 0V or F O = V CC .<strong>No</strong>te 13: The output noise includes the contribution of the internalcalibration operations.<strong>No</strong>te 14: Guaranteed by design <strong>and</strong> test correlation.5

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