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Beyond Bits VII - Freescale Semiconductor

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Back to Table of Contents<br />

Ethernet Subsystem<br />

Real-time networked measurement and control<br />

Vybrid devices, depending on the<br />

particular family, have dual Ethernet<br />

controllers and an L2 switch. The<br />

dual Ethernet controller modules, in<br />

conjunction with an external Ethernet<br />

PHY, are used to add Ethernet<br />

connectivity. Hardware IEEE ® 1588<br />

time stamping provides precision<br />

clock synchronization for real-time<br />

control in networked automation, test<br />

and measurement applications. Midto<br />

high-end industrial applications<br />

typically use dual Ethernet controllers.<br />

One Ethernet MAC can be used to<br />

manage the control nodes while the<br />

other Ethernet MAC can be used to<br />

connect to a remote sever for control<br />

or for redundancy. Most industrial<br />

Ethernet options (i.e., Profinet IRT or<br />

Ethernet Subsystem<br />

Application I/F Application I/F<br />

freescale.com/Vybrid<br />

uDMA<br />

+ AHB I/F<br />

uDMA<br />

+ AHB I/F<br />

3<br />

0<br />

Profinet IRT+) require determinism,<br />

where IEEE 1588 is the enabling<br />

feature. Dual Ethernet with the L2<br />

switch allows daisy chaining which<br />

would otherwise need an expensive<br />

external switch. The function of the L2<br />

switch is to route packets from one<br />

Ethernet port to the other Ethernet<br />

port without any CPU intervention.<br />

Ethernet Subsystem<br />

Features<br />

• Dual 10/100 Ethernet MAC (MAC-<br />

NET)<br />

Hardware support for IEEE 1588<br />

standard for a precision clock<br />

synchronization protocol for<br />

networked measurement and<br />

control systems<br />

L2 Switch<br />

2<br />

1<br />

Receive<br />

FIFO<br />

Transmit<br />

FIFO<br />

<strong>Beyond</strong> <strong>Bits</strong> Vybrid Edition<br />

Ethernet MAC<br />

TOE Functions<br />

TCP/IP<br />

Performance<br />

Optimization<br />

TCP/IP<br />

Performance<br />

Optimization<br />

Reduced media independent<br />

interface (RMII) support<br />

Interfaces with unified DMA<br />

Supports wakeup from lowpower<br />

mode through magic<br />

packets<br />

Multiple clock source options for<br />

time-stamping clock<br />

• L2 Ethernet switch<br />

3-port switch<br />

Supports two MAC-NETs<br />

Supports 64-bit Atlantic/FIFO<br />

ports<br />

IEEE 1588 support<br />

Fast cut-through mode<br />

QoS with eight queues per port<br />

Port mirroring<br />

Level 3 IP snooping<br />

Configuration<br />

Statistics<br />

Register Interface<br />

• Dual unified DMA<br />

RX Control<br />

CRC<br />

Check<br />

CRC<br />

Generate<br />

Pause<br />

Frame<br />

Terminate<br />

TX Control<br />

Pause<br />

Frame<br />

Terminate<br />

MDIO<br />

Master<br />

MII/RMII<br />

Receive<br />

Interface<br />

MII/RMII<br />

Receive<br />

Interface<br />

PHY<br />

Management<br />

Interface<br />

31

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