26.11.2012 Views

Beyond Bits VII - Freescale Semiconductor

Beyond Bits VII - Freescale Semiconductor

Beyond Bits VII - Freescale Semiconductor

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

Back to Table of Contents <strong>Beyond</strong> <strong>Bits</strong> Vybrid Edition<br />

Vybrid Family Details<br />

Vybrid<br />

Families DDR<br />

VF7xx Family<br />

[Heterogenous Dual Core]<br />

ARM ® Cortex-A5 up to 500 MHz<br />

ARM Cortex-M4 up to 167 MHz<br />

364-pin MAPBGA<br />

VF6xx Family<br />

[Heterogenous Dual Core]<br />

ARM Cortex-A5 up to 500 MHz<br />

ARM Cortex-M4 up to 167 MHz<br />

364-pin MAPBGA<br />

VF5xx Family<br />

ARM Cortex-A5 up to 500 MHz<br />

364-pin MAPBGA<br />

VF4xx Family<br />

ARM Cortex-A5 up to 500 MHz<br />

364-pin MAPBGA<br />

VF3xx Family<br />

ARM Cortex-A5 up to 266 MHz<br />

176-pin LQFP<br />

freescale.com/Vybrid<br />

Camera Interface<br />

Video ADC<br />

Common Platform, Analog and Digital<br />

CRC and TZ Address<br />

12-bit ADC<br />

Space Controllers<br />

I 2 C 12-bit DAC<br />

Programmable<br />

Delay Block<br />

USB Host w/PHY<br />

USB OTG w/PHY<br />

Segment LCD<br />

TFT LCD (w/<br />

Touch Screen)<br />

Ethernet<br />

Controller<br />

L2 Switch<br />

Security (HAB,<br />

Tamper, Det.)<br />

External Bus<br />

Y 2<br />

1<br />

Y<br />

Y<br />

Secure JTAG<br />

Flash Controller Secure Fuses<br />

UARTs Timers<br />

Low-Voltage,<br />

Low-Power Multiple<br />

Operating Modes,<br />

Clock Gating<br />

(1.73V–3.6V)<br />

Secure RAM<br />

eSDHC<br />

DMA<br />

ESAI SRAM<br />

2<br />

2<br />

2<br />

Tools<br />

Packaged IDE<br />

Packaged OS<br />

and Multicore<br />

Communication API<br />

Application Software<br />

Ind. Protocols,<br />

Peripheral Drivers<br />

Broad Third-Party<br />

Ecosystem Support<br />

Y<br />

Y<br />

scalable devices that can address the<br />

needs of a market that demands critical<br />

safety and security, connectivity and<br />

rich HMI in the same piece of silicon.<br />

The Vybrid roadmap is built with this<br />

scalability and code compatibility in<br />

mind so that the performance of the<br />

device roadmap grows with customers‘<br />

needs long into the future.<br />

One of the key benefits of the Vybrid<br />

heterogeneous architecture that<br />

combines the ARM Cortex-A5 core<br />

with the ARM Cortex-M4 core is the<br />

partitioning of tasks based on their<br />

characteristics. For tasks that need<br />

predictable interrupt management,<br />

for example, a typical need for realtime<br />

applications, the Vybrid platform<br />

has the ARM Cortex-M4 core with<br />

a Nested Vector Interrupt Controller<br />

(NVIC) while allowing graphical<br />

applications and connectivity stacks<br />

to be run on the ARM Cortex-A5<br />

applications processor.<br />

Software can be segmented so that<br />

tasks that need predictable latencies<br />

can be run on the ARM Cortex-M4<br />

core and computer intensive processes<br />

run on the ARM Cortex-A5 core.<br />

Total System Solution<br />

Vybrid devices take a total system<br />

approach. Complementing the lowpower<br />

silicon is a reference Linux BSP,<br />

a full-featured MQX RTOS, reference<br />

MQX BSP and a processor-toprocessor<br />

communication API that lets<br />

customers partition their code between<br />

the ARM Cortex-A5 (e.g., running<br />

Linux) and ARM Cortex-M4 (e.g.,<br />

running MQX) to implement the lowest<br />

power solution for their application<br />

demands. In addition, customers<br />

have access to industry-leading IDE<br />

tool chains such as CodeWarrior<br />

with Processor Expert, ARM DS-5<br />

and IAR. A selection of connectivity,<br />

motor control, LCD, security stacks<br />

5

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!