hbrisc2 - Microelectronics

BRISC Architecture OverviewH B RISC 2: Latest release of BRISC architecture2: 2nd release/evolution; post BRISC/BRISC11Reduced Instruction Set Computer: One instruction per cycleBi: Embedded Dual floating-point units (A/B)Hardened: faces radiation effectsTN0342-Iss10.pptAll right reserved: Disclosure to third parties of this document or any part thereof, or the use of any information contained therein for purposes other than provided for by this document, is not permitted exceptwith prior and express written permission of S.A.B.C.A.06/12/20046