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Journal of Emerging Technologies in Web Intelligence Contents

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124 JOURNAL OF EMERGING TECHNOLOGIES IN WEB INTELLIGENCE, VOL. 2, NO. 2, MAY 2010In this paper, we take a stance that lies <strong>in</strong>between the two cases described above. The digitization<strong>of</strong> the signal is performed <strong>in</strong>the Intermediate frequencyband, followed by the digital down conversion. Thebaseband process<strong>in</strong>g is done <strong>in</strong> a general purposecomputer. Though this setupdoes not giveus a completees<strong>of</strong>tware control over the radio spectrum, it does <strong>of</strong>fer usa great level <strong>of</strong> flexibility with the s<strong>of</strong>tware s<strong>in</strong>ce we canactually demodulate the signal us<strong>in</strong>g s<strong>of</strong>tware. Thearchitecture used <strong>in</strong> this project is <strong>in</strong>dicated <strong>in</strong> Figure 3.This helps us to explore the part <strong>of</strong> radio spectrum whichhfalls <strong>in</strong> the IF region that canbe digitized.The digital radio systemconsists <strong>of</strong> three ma<strong>in</strong>functional blocks: RF section, IF section and basebandsection. The RF section consists <strong>of</strong> essentially analoghardware modules while IF and baseband sectionssconta<strong>in</strong> digitalhardware modules. The RFsection (alsocalledas RF front-end) is responsiblefortransmitt<strong>in</strong>g/reeceiv<strong>in</strong>g the radio frequency (RF) signalfrom the antenna via a coupler and convert<strong>in</strong>g the RFsignal to an <strong>in</strong>termediate frequency (IF) signal. The RFfront-end on the receive path performs RFamplificationand analog down conversion from RF to IF. On thetransmit path, RF front-end performs analog upconversion andRF power amplification.The ADC/ /DAC blocks perform analog-to-digitaconversion (on receive path) and digital-to analogconversion (ontransmit path), respectively. DDC/DUCCblocks performdigital-downconversion (on receive path)anddigital-up-conversionrespectively. DUC/DDC blocks essentially performmodem operations, i.e., modulation <strong>of</strong> the signal ontransmit path and demodulation <strong>of</strong> the signal on receiveepath.For this paper work, the RF section andthe IF sectionare handled bythe hardware, followed bythe basebandprocess<strong>in</strong>g by Computer. The hardware used is known asthe Universal S<strong>of</strong>tware RadioPeripheral (USRP).(on transmitpath) ),III. SOFFTWARE BASEDFM RECEIVERRThe real implementation <strong>of</strong> the project starts fromhere. The hardware used is a custom built board provideddby the creators <strong>of</strong> the GNU Radio community, which isdesigned to run the free s<strong>of</strong>tware toolkit provided bythem. The ma<strong>in</strong> goal isto take the FM baseddemodulationone step further to receive up to four FMstations simultaneously.What theUSRP gives to the Computer is a Digital-Down converted, complex, quadrature signal <strong>in</strong> theBaseband. Therema<strong>in</strong><strong>in</strong>g process<strong>in</strong>g willl be taken careby the s<strong>of</strong>tware after gett<strong>in</strong>gg the signal from the USRPboard. Thus once the signal enters the computer, thedemodulation <strong>of</strong> the FMsignal consists <strong>of</strong> the follow<strong>in</strong>gsteps.(a) Signal flow from the air to the computer (from real tocomplex)(b) Gett<strong>in</strong>g the <strong>in</strong>stantaneous frequency (from complex toreal)(c) De-emphasizer(d) AudioFIR decimation filter(e) Outputo Soundcard/FileThus each stage <strong>of</strong> this signal process<strong>in</strong>g acts as a blockwith <strong>in</strong>put and outputt ports. Each block receives thesignal as<strong>in</strong>put from the previous block, performs therequired signal process<strong>in</strong>g and gives the output to thenext block <strong>in</strong> the cha<strong>in</strong>.The s<strong>of</strong>tware architecture is implemented <strong>in</strong> two layers.The bottom layer is implemented <strong>in</strong> C++, which satisfiesthe performance requirement <strong>of</strong> thedemodulationandsignal process<strong>in</strong>g. The top layer is implemented <strong>in</strong>python, which acts as a mask layer, <strong>in</strong>terconnect<strong>in</strong>g thebottom C++ layers which perform the bulk <strong>of</strong> the signalprocess<strong>in</strong>g. This two layered architecture gives us theadvantageor reus<strong>in</strong>g the signal process<strong>in</strong>g blocks andmakes it easier to customize the signal process<strong>in</strong>gflownecessary. Thus connect<strong>in</strong>g or remov<strong>in</strong>g a process<strong>in</strong>gblock from the s<strong>of</strong>tware demodulation cha<strong>in</strong> is mucheasier. The entire s<strong>of</strong>tware layer is built and run on a freeUNIX port for w<strong>in</strong>dows called cygw<strong>in</strong>. Cygw<strong>in</strong> <strong>of</strong>fers aUNIX platform on w<strong>in</strong>dows based systemIV. SIGNAL FLOW FROM THE AIR TO THE COMPUTER(FROM REAL TO COMPLEEX).Basically what the USRP does is to select the part <strong>of</strong>the spectrum we are <strong>in</strong>terested <strong>in</strong> and decimate the digitalsequence by some factor N. The result<strong>in</strong>g signal iscomplex with I/Q two channels. Thus USRP gives out a`complex' signal, witha data rate 256k samples persecond, called `quadrature rate' – or quad rate becausethe complex signal has I/Q quadrature components(Figure. 3).Figure.3 Digital down Converter© 2010 ACADEMY PUBLISHER

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