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In-flight upset - 154 km west of Learmonth, WA, 7 October 2008,

In-flight upset - 154 km west of Learmonth, WA, 7 October 2008,

In-flight upset - 154 km west of Learmonth, WA, 7 October 2008,

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3.6.6 Single event effectsBackgroundThere is a constant stream <strong>of</strong> high-energy galactic and occasional bursts <strong>of</strong> solarradiation interacting with the Earth’s upper atmosphere. That interaction creates acascade <strong>of</strong> secondary particles, and some <strong>of</strong> those particles (particularly neutrons)can affect aircraft avionics systems. A single event effect (SEE) is the response <strong>of</strong>an electronic component to the impact <strong>of</strong> a single particle. Unlike EMI, whichaffects interfaces between chips, SEE affects a chip directly.The most common type <strong>of</strong> SEE, a single event <strong>upset</strong> (SEU), occurs when theparticle deposits an electric charge inside a memory cell that is sufficient to changethe cell’s logic state (known as a ‘bit flip’). A range <strong>of</strong> other types <strong>of</strong> SEE can alsooccur. Although some SEEs can result in permanent damage to components, mostare s<strong>of</strong>t faults. 151High-density integrated circuits, such as memory and CPU chips, can beparticularly susceptible to SEEs due to their relatively large number <strong>of</strong> memorylocations and the reduced ‘feature’ size (that is, functional parts in newer chipsgenerally become smaller and more sensitive). SEEs have been confirmed in space-,air- and even ground-based computer systems, and have been shown to generates<strong>of</strong>t errors in a wide range <strong>of</strong> different aircraft systems.The probability <strong>of</strong> an SEE occurring to a particular component at any particularpoint in time is dependent on a range <strong>of</strong> factors, including the number, energy, andtype <strong>of</strong> particles in the area <strong>of</strong> the component’s operation and the component’ssensitivity to SEE. Other relevant factors include the direction and location <strong>of</strong> theparticle strike, and the time in the device’s program cycle at which the strike occurs.Most SEEs have no adverse effects on a system’s performance. For example,changing the logic state <strong>of</strong> a bit within a data word would change the value <strong>of</strong> thatword, but only until the word was refreshed with a new value.More adverse effects occur when the cells that are affected include program data;that is, information critical to the successful execution <strong>of</strong> the core s<strong>of</strong>tware, such ass<strong>of</strong>tware instructions, CPU register information or program pointers. For example,s<strong>of</strong>tware might ‘jump’ to the wrong location in a program, or even to a locationoutside <strong>of</strong> program memory and treat the data there as valid program instructions.Most <strong>of</strong> this critical information is stored and used internally within the chip. As thesuccessful execution <strong>of</strong> s<strong>of</strong>tware depends heavily on program ‘states’ (that is, thetasks being performed at any given point in time), such a disruption can havewide-ranging and complex outcomes. The most common type <strong>of</strong> adverse effect inthese cases results in the system ‘hanging’, although many other adverse states arealso possible and may not be predictable in practice.System manufacturers use a variety <strong>of</strong> techniques to reduce the effects <strong>of</strong>unintended changes <strong>of</strong> logic states, whether they are due to an SEE or other source.These include hardware and s<strong>of</strong>tware design features such as redundancy,monitoring and partitioning. A specific technique to reduce the effects <strong>of</strong> SEE is151<strong>In</strong> the SEE field, a ‘s<strong>of</strong>t fault’ occurs when the logic state <strong>of</strong> a cell is changed to an invalid value,and a ‘firm fault’ refers to a failure that can only be reset by rebooting or cycling the power to thesystem. <strong>In</strong> this report, both <strong>of</strong> these phenomena are termed s<strong>of</strong>t faults.- 143 -

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