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Seven- Step<br />
Class A<br />
Transistor Ampli er Design<br />
Edward A. Lawren ce, WASSWD/6<br />
218 Haloid<br />
Ridgecrest , California 93555<br />
•••<br />
II<br />
Design ing a Class A t ra nsistor amplifier is<br />
nol so hard if you are willing to make a few<br />
reasonable assu m ptio ns. As a matter of fact,<br />
it is just an exercise in O h m's Law. The<br />
biggest assu m ption is that the transistor has<br />
u reasonably high gain, <strong>and</strong> a reasonably lo w<br />
leakage. T his procedure works for NPN,<br />
PNP. Silicon a nd Germ anium. You don't<br />
care if it is Ge o r Si until the 4th step, <strong>and</strong> if<br />
it is NPN or PNP until the last.<br />
If you need a particular gain (voltage<br />
gain), you can determine the proper values<br />
to get it, o r if you want all the gain you can<br />
get. lake the sa me pro cedure, but bypass the<br />
emitter resistor. Refer to Fig. t for the seven<br />
ste ps <strong>and</strong> an example to show ho w they are<br />
used .<br />
Once you have designed the amplifier <strong>and</strong><br />
asse m bled it, check Ye. It should be about<br />
one-half tile supply voltage. If it isn' t,<br />
c ha nge R B2. Increase it if Yc is too lo w, or<br />
vice versa. If you build for a set gain,<br />
remember to allow for the loading of the<br />
nex t stage by figuring the load in parallel<br />
with RL in step 2. If you decid ed to go all<br />
out fo r gain. pick CE to have a reactance of<br />
about one-tenth the value of RE at the<br />
lowest frequen cy you plan to pass through<br />
the amplifier.<br />
This proced ure will allow you to design a<br />
workable amplifier for almost all applications<br />
for Class A RC coupled amplifiers. You<br />
may come upo n a special case, but I have<br />
developed this pro cedure while working in<br />
various Engineering Departments during the<br />
last three years, so I sincerely doubt it.<br />
Additional Remarks<br />
St ep I : To be able to get the maximu m<br />
voltage sw ing o ut befo re clipping, the collector<br />
needs to be set o ne-half the effec tive<br />
su pply voltage below supply voltage. To find<br />
F ig. 1<br />
1. Pic k RL (.6-20 Kl IC=.5VS/R L<br />
2. Calcu late RE (Gain 1 ·2 5 ) AE =RLlGain<br />
3. Calculate VE (IE about equal to IC)<br />
VE=IC(RE)<br />
4 . Add VBE to VE t o get VB. VBE=.3v for Ge, .6<br />
f or S i VB=VE + VBE<br />
5. P ic k A B 1 (3.3-27 Kl<br />
6. Calculate R B2<br />
RB2=RB 1(VS·VB/VB)<br />
7. If NPN, VS is Positive<br />
I f PNP. VS is Negative<br />
Example: NPN Si, 1 2 V D C . Gai n o f 10<br />
1. R L = 10K. t C= 6 / 1 0 K = .6 ma<br />
2. RE = 10K/ 10= 1K<br />
3 . VE "'.6x 10-3x 1xl03 = .6VDC<br />
4. VB=.6+.6:1 .2VOC<br />
5 . RB1 = 12K<br />
6. R B 2 i n K o hms<br />
RB2= 12( 12-1.2/1.2)= 12(9) : 108, use 11 0 K<br />
7 . VS is Positive<br />
effective supply voltage, subtract YE from<br />
VS. Then drop half of that across RL.<br />
Step 2: This step presumes that the gain<br />
of the transist or is higher than the gain the<br />
circu it asks for. No rma lly this will be t il e<br />
case. If you want all the gain you can get.<br />
bypass the emitter resistor. This will increase<br />
the d istortion somewhat. Usually the distortion<br />
will still be low enough fo r amat eur<br />
purposes, but not lo w enough for " Hi-F!".<br />
Step 3: Since the base current is small<br />
compared to the collector current. this is a<br />
good approximation. It is not advisable to<br />
ground the emitter d irectly, as this reduces<br />
the d e stabili ty grea tly. It also makes t his<br />
procedure almost useless, since some of the<br />
assumptions no longer hold. And one resistor<br />
<strong>and</strong> a capacitor arc a very small price<br />
to pay for the advantages gained. Also, as a<br />
rule, the more vo ltage you d rop across the<br />
emitter resist or, the more stable the circuit<br />
will be with temperature changes.<br />
72<br />
73 MAGAZINE