Tutorial: EMC & Signal Integrity using SPICE, page 44 - IEEE EMC ...
Tutorial: EMC & Signal Integrity using SPICE, page 44 - IEEE EMC ...
Tutorial: EMC & Signal Integrity using SPICE, page 44 - IEEE EMC ...
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papers and presentations on <strong>EMC</strong> and signal<br />
integrity related subjects in the US, in<br />
Europe and in Asia. He was a co-recipient<br />
of the best paper award at the 1996 <strong>IEEE</strong><br />
<strong>EMC</strong> Symposium. He is a past <strong>IEEE</strong> <strong>EMC</strong><br />
Society Distinguished Lecturer and currently<br />
serves on the <strong>IEEE</strong> <strong>EMC</strong> Society<br />
Respected Speakers Bureau. He has also<br />
served on the <strong>IEEE</strong> <strong>EMC</strong> Society TC-9<br />
Computational Electromagnetics committee,<br />
the <strong>IEEE</strong> <strong>EMC</strong> Society TC-10 <strong>Signal</strong><br />
<strong>Integrity</strong> committee, and the SAE <strong>EMC</strong><br />
Modeling Task Force committee. On March<br />
9, Dr. Sergiu Radu of Sun Microsystems, a<br />
2009-2010 <strong>IEEE</strong> <strong>EMC</strong> Society Distinguished<br />
Lecturer, was the guest speaker for<br />
the Santa Clara Valley Chapter. After networking<br />
time and a light dinner, Dr. Radu<br />
gave a very informative lecture entitled,<br />
“An Overview of Chip Level <strong>EMC</strong> Problems.”<br />
The CPUs and the VLSI chips are<br />
the primary sources of electromagnetic<br />
noise in all electronic equipment. Reducing<br />
electro magnetic noise at the source<br />
level is usually the best and the most economical<br />
solution. The presentation discussed<br />
typical interference mechanisms<br />
associated with CPU/VLSI, as well as miti-<br />
gation methods at the die-level and package<br />
level. Among the aspects discussed<br />
were some power distribution issues, ondie<br />
decoupling, package capacitors, routing<br />
aspects, the impact of back-bias and forward-bias,<br />
and the impact of die-shrinks on<br />
the EMI performance of the VLSI chips.<br />
Dr. Sergiu Radu is currently Principal<br />
Engineer at Sun Microsystems, leading the<br />
<strong>EMC</strong> design group in Menlo Park, Califor-<br />
nia. His role at Sun includes the development<br />
and implementation of architectural<br />
frameworks for <strong>EMC</strong> design through<br />
design guidelines and best practices, and to<br />
provide forward looking solutions, root<br />
cause analysis of significant <strong>EMC</strong> problems,<br />
design methodologies involving software<br />
simulations and better prediction<br />
techniques. Sergiu Radu received a M.S.<br />
and a Ph.D. in Electrical Engineering<br />
(Electronics) from the Technical University<br />
of Iasi, Romania, and until 1996 he was an<br />
Associate Professor at the same university,<br />
involved in electromagnetic compatibility<br />
teaching and research. From 1996 until<br />
1998 he was a Visiting Scholar, as part of<br />
the Electromagnetic Compatibility Laboratory,<br />
at the University of Missouri-Rolla,<br />
currently Missouri University of Science<br />
and Technology. In 1998 he joined the<br />
<strong>EMC</strong> engineering group at Sun Microsystems.<br />
Sergiu holds seven US patents for<br />
EMI reduction techniques in electronic<br />
systems and has many papers published in<br />
research journals, symposia, and magazines.<br />
He is a reviewer for <strong>IEEE</strong> Transactions on<br />
<strong>EMC</strong>. He is also a Distinguished Lecturer<br />
for the <strong>IEEE</strong> <strong>EMC</strong> Society.<br />
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Photo by Jerry ramie<br />
Dr. Sergiu Radu of Sun Microsystems<br />
shed light on the topic on Chip Level<br />
<strong>EMC</strong> for the Santa Clara Valley Chapter.<br />
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