UNIVERSIT . . AT BONN Physikalisches Institut - Prof. Dr. Norbert ...
UNIVERSIT . . AT BONN Physikalisches Institut - Prof. Dr. Norbert ...
UNIVERSIT . . AT BONN Physikalisches Institut - Prof. Dr. Norbert ...
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60 4. ASIC performance - Electrical tests on bumped CIX 0.2 modules<br />
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Fig. 4.15: Average integrator noise (a) and SNR (b) as a function of the input current<br />
with an additional IntBiasI current. The figure shows results from an unbiased 1 mm thick<br />
CdTe module. The bias current of 800 pA is used to guarantee a certain number of pump<br />
events per frame, thus allowing the measurement of very small input currents. Solid lines<br />
indicate the Poisson limit.<br />
An example of the typical noise amplitudes and signal-to-noise ratios (SNR) with and<br />
without bias current at 1 nA input current is given in Tab. 4.3. The table also contains<br />
the simulated quantum noise for an average photon energy of 30 keV.<br />
At the end of this section Fig. 4.16 gives an overview of the different factors, which<br />
influence the noise measurement. The figure shows the SNR as a function of the input<br />
current using the example of a 3 mm thick CdZnTe module. It is found that the best noise<br />
performance is achieved with unbumped, bare chips. The addition of an unbiased sensor<br />
generally increases the noise by a factor of 2 to 10. At high input currents the difference<br />
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Fig. 4.16: Signal-to-noise ratio (SNR) for different input currents measured on a bare<br />
module (a-c) as well as one with an unbiased 1 mm thick CdTe sensor (d,e). The plot<br />
shows data taken in march 2007 (a) [1] as well as measurements taken at different CKInt<br />
integrator clock settings (10 MHz (b) and 20 MHz (c)). The lowest SNRs were measured<br />
in the bumped CdTe modules at fast clock settings and with an additional bias current (e).