Datascope Passport - Mindray
Datascope Passport - Mindray
Datascope Passport - Mindray
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
CPU Control Module Theory of Operation<br />
2.1 CPU Control Module<br />
Overview<br />
This board has the main program and system controller for the <strong>Passport</strong> 2. It also contains<br />
the Communications Coprocessor, PCMCIA interface, RTC, Audio, CRT/LCD controller,<br />
Serial Channels and module bus interface connectors.<br />
2.1.1 MPC860T Host CPU, U2<br />
Device U2, is a MPC860T Microcontroller, which contains a PowerPC core, 32 bit address<br />
and data bus, Memory Controller (8 banks), general purpose timers, System Integration Unit<br />
(SIU), Multi-Level Interrupts, Communications Processor module, SPI port, 100 Mbit Ethernet<br />
Controller, and a Dual PCMCIA interface. Clock oscillator Y1, 5 Mhz, is multiplied by the<br />
MPC860T's PLL circuit to achieve the 45MHz for <strong>Passport</strong> 2. There are six serial channels,<br />
of which five are used. Two are full RS-232 compliant and are used for external<br />
communications: one is used for the Recorder module; one is used to connect to the<br />
Instrument Radio; and one is used for the Audio Synthesizer which goes to the Keypad/<br />
Display connector.<br />
There are eight programmable chip select/wait state control groups, only six are used. They<br />
are listed below.<br />
The power-on reset to the microcontroller is generated by U14, MAX814L CPU Supervisor.<br />
The signal generated is active low for 140ms. PORESET* is generated whenever both VCC<br />
rises from 0 to 4.75 volts and the 3.3V rises from 0 to 2.75V. The PORESET* signal is<br />
distributed to other components that require a power on reset by using a spoke distribution<br />
with series resistors instead of a daisy chain to better balance the signal paths. The U1 CPLD<br />
in turn generates a HRESET* signal and a buffered BRESET* signal that is used to reset all<br />
external components that require a reset other than PORESET*.<br />
All high speed clock signal and control lines have series terminating resistors to reduce EMI.<br />
2.1.2 Serial Communications Channels<br />
There are four serial communications channels called SCC's that are part of the MPC860T's<br />
Communication Processor Module. The following describes the function of each of them.<br />
SCC1 - This channel is assigned to external communication use. It is buffered (U49) to RS-<br />
232 levels before connection to the docking connector which is part of the base station or<br />
comm-port system. SCC1 will operate in the standard UART mode with all hardware control<br />
lines available.<br />
SCC2 - This channel is assigned to external communication use. It is buffered (U50) to RS-<br />
232 levels before connection to the docking connector which is part of the base station or<br />
comm-port system. SCC2 will operate in the standard UART mode with all hardware control<br />
lines available.<br />
SCC3 - This channel is assigned to the Instrument Radio on connector J15.<br />
2 - 2 0070-10-0441 <strong>Passport</strong> 2®/<strong>Passport</strong> 2 LT Service Manual