Datascope Passport - Mindray

El Display Interface Board Theory of Operation
2.12 El Display Interface Board
2.12.1 Overview
This board provides interface and support for the EL display, an SPI interface to a 4x8 matrix
keypad, optical encoder and LED’s. It also provides connection for a speaker.
2.12.2 Detailed Description
CPLD Interface to the CPU Board Via SPI
The purpose of the CPLD (U1) is to interface to, and scan for, key presses on the front panel
keypad. The method of communicating with the CPLD is the SPI port of the 68HC916X1
communications processor on the CPU control board (0670-00-0674). The SPI interface is a
serial interface with separate serial data and clock. Data can flow either direction using a
common clock. The communications processor is set as the master device and the CPLD can
only be a slave.
Video Display Connections
The J5 connector is for the EL display. The EL display requires a 12V excitation voltage, 5V to
power the logic circuitry, and can recognize the 3.3V logic levels. Data lines LD0 through
LD7 are driven by 3.3V logic from the video processor, and filtered with 68pF capacitors to
3.3V ground to prevent ringing.
Speaker Connection
The system speaker is connected to J2. The EL Display/Keypad Interface Board functions as a
pass through for this signal.
Encoder Connection
The optical encoder for the keypad is connected to J4. Phase signals (CHA/CHB) and the
switch contact signal (SW) are passed through the EL Display/Keypad Interface Board to an
ADC on the CPU board.
VDD Control Circuit
The board employs a P-Channel FET together with a NPN Transistor to provide power
switching for the EL display’s 12V excitation. The FET is controlled by the transistor which is
switched on and off.
JTAG Connection
The board is equipped with JTAG Connector, J9, for in-circuit programming of the Keypad
Scanning CPLD.
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