Chapter 08 Power, Reset, and Clock Management (PRCM).pdf

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www.ti.com Power, Reset, and Clock Management 3. The wake up event will also trigger interrupt to Cortex M3 4. On the wakeup event due to interrupt Cortex M3 execute the following • Restore the voltages to normal Operating voltage • Enable PLL locking • Cortex M3 will switch ON the power domains and/or enable clocks for PD_PER • Cortex M3 will switch ON the power domains and/or enable clocks for PD_MPU • Executes WFI 5. Cortex A8 MPU starts executing from ROM reset vector 6. Restore the application context(only for Deep sleep 0) 8.1.5 PRCM Module Overview The PRCM is structured using the architectural concepts presented in the 5000x Power Management Framework. This framework provides: A set of modular, re-usable FSM blocks to be assembled into the full clock and power management mechanism. A register set and associated programming model. Functional sub-block definitions for clock management, power management, system clock source generation, and master clock generation. The device supports an enhanced power management scheme based on four functional power domains: Generic Domains • WAKEUP • MPU • PER • RTC The PRCM provides the following functional features: • Software configurable for direct, automatic, or a combination thereof, functional power domain state transition control • Device power-up sequence control • Device sleep / wake-up sequence control • Centralized reset generation and management • Centralized clock generation and management The PRCM modules implement these general functional interfaces: • OCP configuration ports • Direct interface to device boundary • Power switch control signals • Device control signals • Clocks control signals • Resets signals • A set of power management protocol signals for each module to control and monitor standby, idle and wake-up modes (CM and PRM) • Emulation signals 8.1.5.1 Interface Descriptions This section lists and shortly describes the different interfaces that allow PRCM to communicate with other modules or external devices. SPRUH73E–October 2011–Revised May 2012 Power, Reset, and Clock Management (PRCM) Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated 647
Power, Reset, and Clock Management www.ti.com 8.1.5.1.1 OCP Interfaces The PRCM has 1 target OCP interfaces, compliant with respect to the OCP/IP2 standard. The OCP port, for the PRCM module is used to control power, reset and wake-up Management. 8.1.5.1.2 OCP Slave Interfaces PRCM implements a 32-bit OCP target interface compliant to the OCP/IP2.0 standard. 8.1.5.1.3 Power Control Interface The Device does has power domain switches over the device, this interface provides PRCM control over power domain switches and receives responses from the power domains which indicate the switch status. It also controls the isolation signals. The control for power domain switches will be latched in PRCM Status Registers 8.1.5.1.4 Device Control Interface This interface provides PRM management of several device-level features which are not specific to any single power domain. This PRM interface controls signals to/from the device for global control: • Device Type coding • IOs isolation control 8.1.5.1.5 Clocks Interface This interface gathers all clock inputs and outputs managed by PRCM modules. 8.1.5.1.6 Resets Interface This interface gathers all resets inputs and outputs managed by PRCM module. 8.1.5.1.7 Modules Power Management Control Interface Modules or subsystems in the device are split over 2 categories: • Initiator: an initiator is a module able to generate traffic on the device interconnects (typically: processors, MMU, EDMA). • Target: a target is a module that cannot generate traffic on the device interconnects, but that can generate interrupts or DMA request to the system (typically: peripherals). PRCM handles a power management handshake protocol with each module or sub-system. This protocol allows performing proper clock and power transition taking into account each module activity or state. 8.1.5.1.8 Initiator Modules Interface PRCM module handle all initiator modules power management interfaces: MStandby signal MWait signal 8.1.5.1.9 Targets Modules Interface PRCM module handle all target modules power management interfaces: SIdleReq signal SIdleAck signal FCLKEN signal PRCM module handles all target modules wake-up: SWakeup signal Note: USB Support for SWakeUp 8.1.6 Clock Generation and Management PRCM provides a centralized control for the generation, distribution and gating of most clocks in the device. PRCM gathers external clocks and internally generated clocks for distribution to the other modules in the device. PRCM manages the system clock generation 8.1.6.1 Terminology The PRCM produces 2 types of clock: 648 Power, Reset, and Clock Management (PRCM) SPRUH73E–October 2011–Revised May 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
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Chapter 08 Power, Reset, and Clock Management (PRCM).pdf

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