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Chapter 08 Power, Reset, and Clock Management (PRCM).pdf

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www.ti.com <strong>Power</strong>, <strong>Reset</strong>, <strong>and</strong> <strong>Clock</strong> <strong>Management</strong><br />

Table 8-8. <strong>Clock</strong> Domain States<br />

State Description<br />

ACTIVE<br />

IDLE_TRANSITION<br />

Every nondisabled slave module (that is, those whose<br />

MODULEMODE value is not set to disabled) is put out of IDLE<br />

state.<br />

All interface clocks to the nondisabled slave modules in the<br />

clock domain are provided. All functional <strong>and</strong> interface clocks to<br />

the active master modules (that is, not in STANDBY) in the clock<br />

domain are provided. All enabled optional clocks to the modules<br />

in the clock domain are provided.<br />

This is a transitory state.<br />

Every master module in the clock domain is in STANDBY state.<br />

Every idle request to all the slave modules in the clock domain is<br />

asserted. The functional clocks to the slave module in enabled<br />

state (that is, those whose MODULEMODE values are set to<br />

enabled) remain active.<br />

All enabled optional clocks to the modules in the clock domain<br />

are provided.<br />

All clocks within the clock domain are gated.<br />

Every slave module in the clock is in IDLE state <strong>and</strong> set to<br />

disabled.<br />

INACTIVE Every slave module in the clock domain (that is, those whose<br />

MODULEMODE is set to disabled) is in IDLE state <strong>and</strong> set to<br />

disabled.<br />

Every optional functional clock in the clock domain is gated<br />

Each clock domain transition behavior is managed by an associated register bit field in the CM__CLKSTCTRL[x] CLKTRCTRL <strong>PRCM</strong> module<br />

Table 8-9. <strong>Clock</strong> Transition Mode Settings<br />

CLKTRCTRL Bit Value Selected Mode Description<br />

8.1.4 <strong>Power</strong> <strong>Management</strong><br />

0x0 Reserved NA<br />

A software-forced sleep transition. The<br />

0x1 SW_SLEEP transition is initiated when the associated<br />

hardware conditions are satisfied<br />

0x2 SW_WKUP<br />

0x3 Reserved NA<br />

A software-forced clock domain wake-up<br />

transition is initiated<br />

The <strong>PRCM</strong> module manages the switching on <strong>and</strong> off of the power supply to the device modules. To<br />

minimize device power consumption, the power to the modules can be switched off when they are not in<br />

use. Independent power control of sections of the device allows the <strong>PRCM</strong> module to turn on <strong>and</strong> off<br />

specific sections of the device without affecting the others.<br />

8.1.4.1 <strong>Power</strong> Domain<br />

A power domain is a section (that is, a group of modules) of the device with an independent <strong>and</strong> dedicated<br />

power manager (see Figure). A power domain can be turned on <strong>and</strong> off without affecting the other parts of<br />

the device.<br />

SPRUH73E–October 2011–Revised May 2012 <strong>Power</strong>, <strong>Reset</strong>, <strong>and</strong> <strong>Clock</strong> <strong>Management</strong> (<strong>PRCM</strong>)<br />

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Copyright © 2011–2012, Texas Instruments Incorporated<br />

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