Chapter 08 Power, Reset, and Clock Management (PRCM).pdf

www.ti.com Power, Reset, and Clock Management
8.1 Power, Reset, and Clock Management
8.1.1 Introduction
The device power-management architecture ensures maximum performance and operation time for user
satisfaction (audio/video support) while offering versatile power-management techniques for maximum
design flexibility, depending on application requirements. This introduction contains the following
information:
• Power-management architecture building blocks for the device
• State-of-the-art power-management techniques supported by the power-management architecture of
the device
8.1.2 Device Power-Management Architecture Building Blocks
To provide a versatile architecture supporting multiple power-management techniques, the powermanagement
framework is built with three levels of resource management: clock, power, and voltage
management.
These management levels are enforced by defining the managed entities or building blocks of the powermanagement
architecture, called the clock, power, and voltage domains. A domain is a group of modules
or subsections of the device that share a common entity (for example, common clock source, common
voltage source, or common power switch). The group forming the domain is managed by a policy
manager. For example, a clock for a clock domain is managed by a dedicated clock manager within the
power, reset, and clock management (PRCM) module. The clock manager considers the joint clocking
constraints of all the modules belonging to that clock domain (and, hence, receiving that clock).
8.1.3 Clock Management
The PRCM module along with the control module manages the gating (that is, switching off) and enabling
of the clocks to the device modules. The clocks are managed based on the requirement constraints of the
associated modules. The following sections identify the module clock characteristics, management policy,
clock domains, and clock domain management
8.1.3.1 Module Interface and Functional Clocks
Each module within the device has specific clock input characteristic requirements. Based on the
characteristics of the clocks delivered to the modules, the clocks are divided into two categories: interface
clocks and functional clocks
PRCM
Clock generator
Figure 8-1. Functional and Interface Clocks
Interface clock
Device interconnect
Functional clock
The interface clocks have the following characteristics:
X_ICLK
Registers Interconnect
interface
Module X
X_FCLK
prcm-001
• They ensure proper communication between any module/subsystem and interconnect.
• In most cases, they supply the system interconnect interface and registers of the module.
• A typical module has one interface clock, but modules with multiple interface clocks may also exist
(that is, when connected to multiple interconnect buses).
SPRUH73E–October 2011–Revised May 2012 Power, Reset, and Clock Management (PRCM)
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