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Chapter 08 Power, Reset, and Clock Management (PRCM).pdf

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www.ti.com <strong>Power</strong>, <strong>Reset</strong>, <strong>and</strong> <strong>Clock</strong> <strong>Management</strong><br />

Table 8-5. Slave Module Mode Settings in <strong>PRCM</strong> (continued)<br />

MODULEMODE Bit VALUE Selected Mode Description<br />

0x2 Enabled<br />

0x3 Reserved NA<br />

This mode applies to a module when the<br />

<strong>PRCM</strong> module manages its interface <strong>and</strong><br />

functional clocks. The functional clock to<br />

the module remains active unconditionally,<br />

while the <strong>PRCM</strong> module automatically<br />

asserts/deasserts the module idle request<br />

based on the clock-domain transitions. If<br />

acknowledged by the module, the <strong>PRCM</strong><br />

module can gate only the interface clock<br />

to the module.<br />

In addition to the IDLE <strong>and</strong> STANDBY protocol, <strong>PRCM</strong> offers also the possibility to manage optional<br />

clocks, through a direct SW control: “OptFclken” bit from programming register.<br />

Table 8-6. Module <strong>Clock</strong> Enabling Condition<br />

<strong>Clock</strong> Enabling<br />

<strong>Clock</strong> associated with<br />

STANDBY protocol<br />

AND<br />

OR<br />

<strong>Clock</strong> Domain is ready<br />

MSt<strong>and</strong>by is de-asserted<br />

Mwakeup is asserted<br />

<strong>Clock</strong> Domain is ready<br />

<strong>Clock</strong> associated with IDLE<br />

protocol, as interface clock<br />

AND<br />

OR<br />

Idle status = FUNCT<br />

Idle status = TRANS<br />

<strong>Clock</strong> Domain is ready<br />

SWakeup is asserted<br />

<strong>Clock</strong> associated with IDLE<br />

protocol, as functional clock<br />

AND<br />

OR<br />

Idle status = FUNCT<br />

Idle status = IDLE<br />

Idle status = TRANS<br />

8.1.3.3 <strong>Clock</strong> Domain<br />

Optional clock AND<br />

<strong>Clock</strong> domain is ready<br />

OptFclken=Enabled ('1')<br />

SWakeup is asserted<br />

A clock domain is a group of modules fed by clock signals controlled by the same clock manager in the<br />

<strong>PRCM</strong> module By gating the clocks in a clock domain, the clocks to all the modules belonging to that<br />

clock domain can be cut to lower their active power consumption (that is, the device is on <strong>and</strong> the clocks<br />

to the modules are dynamically switched to ACTIVE or INACTIVE (GATED) states). Thus, a clock domain<br />

allows control of the dynamic power consumption of the device. The device is partitioned into multiple<br />

clock domains, <strong>and</strong> each clock domain is controlled by an associated clock manager within the <strong>PRCM</strong><br />

module. This allows the <strong>PRCM</strong> module to individually activate <strong>and</strong> gate each clock domain of the device<br />

SPRUH73E–October 2011–Revised May 2012 <strong>Power</strong>, <strong>Reset</strong>, <strong>and</strong> <strong>Clock</strong> <strong>Management</strong> (<strong>PRCM</strong>)<br />

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Copyright © 2011–2012, Texas Instruments Incorporated<br />

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