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4<br />

Projects<br />

Figure 4-45<br />

NetROM Connection Macros<br />

4<br />

WDB_NETROM_NUM_ACCESS<br />

The value 1 indicates that pod zero is accessed only once when a word of<br />

memory is read.<br />

WDB_NETROM_POLL_DELAY<br />

The value 2 specifies that the NetROM is polled every two VxWorks clock ticks<br />

to see if data has arrived from the host.<br />

WDB_NETROM_ROMSIZE<br />

The default value is ROM_SIZE, a makefile macro that can be set for a specific<br />

build. See Makefile Macros, p.131.<br />

WDB_NETROM_TYPE<br />

The default value of 400 specifies the old 400 series.<br />

WDB_NETROM_WIDTH<br />

The value 1 indicates that the ROMs support 8-bit access. To change this to 16-<br />

or 32-bit access, specify the value 2 or 4, respectively.<br />

The size of the NetROM dual-port RAM is 2 KB. The NetROM permits this 2 KB<br />

buffer to be assigned anywhere in the pod 0 memory space. The default position<br />

for the NetROM dual-port RAM is at the end of the pod 0 memory space. The<br />

following line in target/src/config/usrWdb.c specifies the offset of dual-port RAM<br />

from the start of the ROM address space.<br />

dpOffset = (WDB_ROM_SIZE - DUALPORT_SIZE) * WDB_NETROM_WIDTH;<br />

If your board has more than one ROM socket, this calculation gives the wrong<br />

result, because the VxWorks macro ROM_SIZE describes the total size of the ROM<br />

139

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