FPGA based Hardware Accleration for Elliptic Curve Cryptography ...

4.2. XILINX XCV405E 28
implementation of a CKM with a maximum width of 64 bit within the datapath. The exact number varies
on other generator parameters such as the number of segments.
4.2 Xilinx XCV405E
The XCV405E FPGA device from Xilinx, Inc. is a high-end FPGA providing 400K system gates. This
device allows the implementation of a CKM with up to 85 bits. Due to the newer technology and powerful
routing resources higher frequencies can be achieved compared to the XC4085XLA device. Similar to the
XC4085XLA the XCV405E is applied on a PCI interface card. This ADM-XRC-II platform from Alpha
Data, Inc. [22] provides a
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-bit wide PCI interface and 6M Bytes SRAM. It supports up to two different
Xilinx VirtexE or Virtex2 FPGA devices on one PCI interface card.
4.3 Atmel AT94K40
The AT94K40 from Atmel, Inc. [9] is a System-on-Chip device. As illustrated in Fig. 4.2 it provides an 8 bit
AVR Ž processor core, FPGA resources, some peripherals and up to 36K Byte of SRAM on a single chip.
With only 40K system gates the FPGA resources are limited and allow the implementation of a maximum
width of 25 bit for the CKM. Compared to the Xilinx based implementations which use the PCI bus for the
communication with the software running on the host system, the AT94K40 provides a low latency interface
between FPGA hardware part and Ž processor core that is capable of 8 bit transfers in each clock cycle.
Figure 4.2: Atmel AT94K40
Due to these features it is reasonable to run the EC level algorithms in software on the Ž processor core.
By this, the replacement of the EC algorithms proposed in Chap. 2 with the better performing 2P algorithm
documented in [23] could realized easily.