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Efficient Model for OFDM based IEEE 802.11 Receiver with Autocorrelation technique And…<br />

VI. CONCLUSION<br />

The Proposed model concludes that the performance of the WLAN receiver has been enhanced by<br />

means of Autocorrelator and CORDIC Algorithm.<br />

Autocorrelator can perform synchronization for frame ,time and frequency. It has been also proved<br />

that Autocorrelation is suitable for synchronization. After a careful analysis of competing algorithms, it is<br />

decided that the best choice for time synchronization is to use the basic Auto-Correlation estimator. To get more<br />

accuracy for estimating the frequency offsets, CORDIC algorithm is used. It is used for estimating the carrier<br />

frequency offsets as well as compensating those frequencies by estimating the phase of the maximum<br />

correlating signal. It is more advantageous to greatly reduces the delay while using the multiplier hardware. In<br />

previous methods for estimating the offsets, eventhough it achieves better result it lack accuracy. But in the<br />

proposed model, the given sample is serially iterated in order to achieve the bit of accuracy. It also achieves<br />

minimum resource utilization.The proposed model also proved that the utility of devices is lesser than the other<br />

existing model. In the end, the proposed design consumed an relatively low quantity of hardware resources,<br />

gives less delay and produced excellent results for packet detection, frequency offset estimation, and time,<br />

frequency synchronization.<br />

VII. FUTURE WORK<br />

By getting the better results, it is also decided that the quantized 64 sample cross correlator, in<br />

conjunction with the maximum detector, it would be used for fine time synchronization. On analysis, it is<br />

obtained that the fast pipelined CORDIC architecture drastically increases area and power by increasing number<br />

of iterations and number of cells usage. Thus the algorithm is greatly enhanced in future use. This design can<br />

also be implemented in FPGA or ASIC to achieve the spectral efficiency in OFDM WLAN reciever. The<br />

minimization of the power difference or maximizing the SINR approaches could be considered to optimize the<br />

compensation process such that the system performance is improved. From the architectural point of view where<br />

the iterative process adds more challenge to the design of the synchronization unit. Furthermore, the timing and<br />

frequency synchronization architecture unit could be evaluated in a testbed OFDM system.<br />

REFERENCES<br />

[1] Johnsson, M. HIPERLAN/2 -- The Broadband Radio Transmission Technology Operating in the 5 GHz Frequency Band,<br />

14.9.1999 [referenced 1.11.1999]<br />

[2] M.J. Canet, F. Vicedo, V. Almenar, J. Valls, E.R. de Lima,“A common FPGA-basedsynchronizerarchitecture for Hiperlan/2 and<br />

802.11a WLAN systems”. PIMRC 2004, Barcelona, Spain, 2004.<br />

[3] David Gesbert, Mansoor Shafi, Dashan Shiv, Peter J Smith, and Aymon Naguib, “From Theory to Practice: An Overview of<br />

MIMO Space-Time coded Wireless Systems”, IEEE Journal on selected areas in Communications,Vol.21,No.3,Aprial 2003.<br />

[4] Siavash M.Alamouti, “A Simple Transmit diversityTechnique for Wire less Communications”,IEEE Journal on selected areas in<br />

Communications, Vol.16, No.8, October 1998.<br />

[5] Kaiser, Wilzeck, Berentsen and Rupp , “Prototyping for MIMO Systems: An Overview” ,International Conference EUSIPCO,<br />

Austria, pp.681-688, Sept 6-10, 2004.<br />

[6] Terry J., Heiskala J.: "OFDM Wireless LANs: A Theoretical and Practical Guide", Indianapolis, Ind.: Sams, 2002.<br />

[7] JohnG. Proakis and Dimities G. Manolakis, Digital Signal Processing Principles, Algorithms and Applications”, Prentice-Hall<br />

India Publications, Third Edition, ISBN -81-203-1129-9.<br />

[8] Meyer-Baese.U, “Digital Signal Processing with Field Programmable Gate Arrays”,Springer- Verlag, ISBN 81-8128-045-8, 2003.<br />

[9] Sudhakar Reddy .P and Ramachandra Reddy.G, “Design and Implementation of Autocorrelator and CORDIC Algorithm for<br />

OFDM based WLAN”, European Journal of Scientific Research, UK, Vol.25, No.2, Nov, 2008.<br />

[10] Jose.M Canet, Felip Vicedo, Vicenc Almenar, Javier Valls, “FPGA Implementation of an IF transceiver for OFDM-based WLAN”,<br />

IEEE Workshop on Signal Processing Systems, Vol.2,pp. 227-232, October, 2004.<br />

[11] AlmenarV, Abedi S and Rahim Tafazolli, “Synchronization Techniques for HIPERLAN/2”, 54 th IEEE Vehicular Technology<br />

Conference, Vol. 2, pp. 762-766, 2001(Fall).<br />

[12] Jack Volder, “The CORDIC Trigonometric Computing Technique”, IRE Transactions on Electronic Computing, Vol EC-8, pp.330-<br />

334, September 1959.<br />

[13] Ray Andraka, “A survey of CORDIC algorithms for FPGA based computers”, ACM 0-89791-978-5/98/01, 1998.<br />

[14] AL-Dweik, A. Hazmi, S. Younis, B. S. Sharif, and C. C. Tsimenidis, “Iterative frequency offset estimator for OFDM systems,” IET<br />

Com., vol. 4, p. 2008 2019, 2010.<br />

[15] I. Tolochko& M. Faulkner, “Real Time LMMSE Channel Estimation for Wireless OFDM Systems with Transmitter Diversity,” in<br />

proc. IEEE 56 th VTC, vol. 3, Fall 2002, pp. 1555– 1559.<br />

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