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Design and Simulation of Nonisolated ZVZCS…….<br />

where V r,4 = V Cr,max – V C2 , Z= √L r /C r and ω r = 1/ √L r /C r .<br />

This mode ends when i Lr is equal to i Lf .<br />

Mode 5 (t 4 – t 5 ) : After i Lr equals i Lf , i SU changes its direction, then this mode begins. At the end of this<br />

mode, turn-off signal of S U is applied and this mode ends.<br />

V. VOLTAGE CONVERSION RATIO<br />

To obtain the voltage gain of the proposed converter, it is assumed that the voltage across C 1 and C 2 are<br />

constant during the switching period T s . The output voltage is given by<br />

It can also be expressed as<br />

effective duty D eff and voltage drop ∆V are expressed using duty loss ∆D.<br />

where<br />

V C1 that is the same as output voltage of the boostconverter<br />

can be expressed as<br />

Design is carried out for findingLf, fr,Lr and Cr<br />

A. Design of Lf<br />

V C2 can be expressed as<br />

In the steady state, the average load current equals the average current of diodes D L and D U. Since i Lr , flows<br />

through the D L during mode 2, the average load current can be obtained as follows.<br />

From the above equation, V Cr,min and V Cr,max can be obtained by,<br />

VI. DESIGN OF THE PROPOSED CONVERTER<br />

The generalized scheme of the proposed converter has been shown in Fig.3.,where it is configured with<br />

proper numbers of series and parallel connected basic cells. This leads to flexibility in device selection resulting<br />

www.<strong>ijcer</strong>online.com ||May ||2013|| Page 5

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