Astronomy Principles and Practice Fourth Edition.pdf

Charge coupled devices 301
V G
Metallic electrode [gate]
—— —— —
SiO 2 insulator
+
+ + +
p-type semiconductor (Si)
Figure 18.11. A basic photosite within a CCD showing the depletion volume beneath the electrode when a positive
potential V G is applied to the gate.
1 Pixel
Exposure
0
(a) +10
0
Applied
voltages
(b)
Read-out
Charge accumulation
during exposure
0
+5
+10
1 st Switch
(c)
+10
0
+5
2 nd Switch
+5
(d) +10 3 rd Switch
0
Etc.
Figure 18.12. A section of a row within a CCD detector is shown in (a) with the gate voltages configured for
exposure. The ‘bucket brigade’ principle whereby the pixels are read out, in turn, by a repetitive voltage switching
cycle is illustrated in (b), (c)and(d).
Complete CCD detector chips are made with a variety of architectures. In the example depicted
in figure 18.12, each pixel comprises three basic capacitors or gates within a space ∼20 µm, formatted
in rows. There are common connections between the elements comprising each pixel. Figure 18.12(a)