Optimod-Surround 8685 V1.0 Operating Manual - Orban

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6-40 TECHNICAL DATA ORBAN MODEL <strong>8685</strong> ============= "Accomodation Provisions" =========== (Reserved) N/C Default Default GPIRQ11 GPIRQ10 GPIRQ3 GPIRQ4 Patch 4 Patch 3 Patch 2 Patch 1 CPU Module JTAG Port N/C N/C N/C N/C N/C N/C 1 2 10uF C1 1 2 4.7uF C2 1 2 0.1uF C3 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 PC-104 Pinouts /CHCHK Ground SD7 RESDRV SD6 +5v. SD5 IRQ9 SD4 -5v. SD3 DRQ2 SD2 -12v. SD1 /ENDXFR SD0 +12v. CHRDY AEN /SMWTC SA19 /SMRDC SA18 /IOWC SA17 /IORC SA16 /DACK3 SA15 DRQ3 SA14 /DACK1 SA13 DRQ1 SA12 /REFRESH SA11 CLK SA10 IRQ7 SA9 IRQ6 SA8 IRQ5 SA7 IRQ4 SA6 IRQ3 SA5 /DACK2 SA4 TC SA3 BALE SA2 +5v. SA1 OSC SA0 Ground Ground Ground A B (Key) C D Ground Ground /SBHE /MCS16 LA23 /IO16 LA22 IRQ10 LA21 IRQ11 LA20 IRQ12 LA19 IRQ15 LA18 IRQ14 LA17 /DACK0 /MEMRD DRQ0 /MEMWR /DACK5 SD8 DRQ5 SD9 /DACK6 SD10 DRQ6 SD11 /DACK7 SD12 DRQ7 SD13 +5V. SD14 /MASTER16 SD15 Ground (Key) Ground A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 A10 A11 B11 A12 B12 A13 B13 A14 B14 A15 B15 A16 B16 A17 B17 A18 B18 A19 B19 A20 B20 A21 B21 A22 B22 A23 B23 A24 B24 A25 B25 A26 B26 A27 B27 A28 B28 A29 B29 A30 B30 A31 B31 A32 B32 D0 C0 D1 C1 D2 C2 D3 C3 D4 C4 D5 C5 D6 C6 D7 C7 D8 C8 D9 C9 D10 C10 D11 C11 D12 C12 D13 C13 D14 C14 D15 C15 D16 C16 D17 C17 D18 C18 D19 A1a GPIRQ3 GPIRQ4 GPIRQ5 GPIRQ6 GPIRQ7 GPIRQ9 +5VD 3-6D, 2-1A 2-1A, 3-7B 2-1B 3-7C, 2-1B 2-1A, 3-7C 3-7C 3-7C 3-6D, 2-1A 3-6D, 2-1A GPIRQ12 GPIRQ11 GPIRQ10 GPIRQ14 GPIRQ15 SD15 SD14 SD13 SD12 SD11 SD10 SD9 SD8 SA17 SA18 SA19 SA20 SA21 SA22 SA23 2-1B 2-1B 2-1B 2-1B 3-7C 3-7C 3-7C F E F1 E1 F2 E2 F3 E3 F4 E4 F5 E5 F6 E6 F7 E7 F8 E8 F9 E9 F10 E10 F11 E11 F12 E12 F13 E13 F14 E14 F15 E15 F16 E16 F17 E17 F18 E18 F19 E19 F20 E20 F21 E21 F22 E22 F23 E23 F24 E24 F25 E25 F26 E26 F27 E27 F28 E28 F29 E29 F30 E30 F31 E31 F32 E32 A1b 4-8B PATCH4 PATCH3 PATCH2 PATCH1 2-1B 1 2 10uF C4 1 2 4.7uF C5 1 2 0.1uF C6 +5VD 2-1B, 3-7D /CTS1 /DSR1 /DCD1 /RI1 /CTS2 TV2 TV3 TV30 TV31 TV32 TV33 TV34 TV35 TV36 TV37 TV38 TV39 TV40 +5VD 3-7C 3-7C GPIRQ3 GPIRQ4 GPIRQ5 GPIRQ6 GPIRQ7 GPIRQ9 GPIRQ10 GPIRQ11 GPIRQ12 GPIRQ14 GPIRQ15 TV41 TV42 TV43 TV44 TV45 TV46 TV47 TV48 TV49 TV50 TV51 TV52 TV53 TV54 TV55 TV56 TV57 TV58 TV59 TV60 TV61 TV62 TV63 TV64 TV65 TV66 TV67 TV68 TV69 4-8B TV70 TV71 SOUT1 SIN1 /RTS1 /DTR1 SOUT2 SIN2 /RTS2 TV74 TV75 TV76 TV77 TV72 TV73 TV80 TV81 TV82 TV83 TV84 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J13 TV85 TV86 TV87 TV88 3-7D, 2-1B 3-7D 3-7D, 2-1B SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 /GPIOCS GPRDY /SMEMWR /SMEMRD /DACK1 DRQ1 GPTC GPALE /MEMCS16 /SBHE JTAG_STOP/TX JTAG_CMD/ACK JTAG_TDO JTAG_TDO JTAG_/TRST JTAG_/TRST /DTR2 /RING2 /DCD2 /DSR2 SSI_DI SSI_CLK SSI_DO Rsvd_1 Rsvd_0 Rsvd_3 /GPCS3 CLK_TIME/TEST /GPCS4 Rsvd_2 Rsvd_7 Rsvd_6 /GPCS6 IDE_/DACK IDE_DREQ /GPIOCS16 /MEMRD 18.432MHz 36.864MHz /GPIORD /MEMWR GPAEN /GPIOWR /GPCS1 /GPCS2 /GPCS5 /GPCS7 CPU_+3.3V CPU_+2.5V /DACK0 /DACK0 DRQ0 DRQ0 /DACK5 /DACK5 DRQ5 DRQ5 /DACK6 /DACK6 DRQ6 DRQ6 /DACK7 /DACK7 DRQ7 DRQ7 JTAG_TRIG JTAG_TRIG JTAG_TDI JTAG_TDI 24.576MHz JTAG_TMS JTAG_TMS JTAG_TCK JTAG_TCK JTAG_BR/TC JTAG_BR/TC RSTDRV GPIRQ(3..15) SA(0..25) AUX_PATCH AUX_COMM SD(0..15) Base Board Schematic: CPU Module Interface (version 62165.000.06) Sheet 2 of 4
OPTIMOD SURROUND PROCESSOR TECHNICAL DATA 6-41 +RAW +5VD Plus15V Minus15V Plus5VA Minus5VA +5vD +RAW DSP3.3VA DSP3.3VB CPU_+3.3V CPU_+2.5V R72 30.1K R69 R65 10.0K R75 10.0K R73 10.0K R74 10.0K R80 10.0K R81 10.0K 10.0K R63 10.0K R71 10.0K R70 10.0K TV27 TV29 TV28 (A SMALL PATCH OF GROUND) R64 14.0K R67 1 2 R62 2.00K 10.0K D13 BAT54C R60 10.0K R61 10.0K 3 D14 1 3 2 BAT54C R68 1 2 10.0K R76 1 2 TV1 R102 2.49K D15 1 3 2 BAT54C 10.0K D16 3 BAT54C D17 3 BAT54C U19 13 X0 14 X1 15 X2 12 X3 1 X4 5 X5 2 X6 4 X7 Vcc_PSM VDD VSS VEE INH 1674HC4051M 8 7 6 DGND R66 DGND C38 11 A 10 B 9 C 100K 3 X 1 2 DGND 0.1uF 10% PMA0 PMA1 PMA2 R85 DGND 100K C36 1 2 R78 332K 10uF Vcc_PSM C40 2 1 22pF C41 2 1 22pF TV24 U20 1 LP2987IM-5.0 5 OUTPUT N.C. 4 INPUT 6 SENSE 8 /SHUTDOWN 7 /ERROR GND 3 2 DELAY 4.000 MHz 1 2 MCLR X1 R79 1.00K 16 OSC1 15 OSC2/OUT 17 RA0/AN0 18 RA1 1 RA2/AN2/VREF 2 RA3/AN3 4 U18 MCLR C39 PIC16C711/P 3 RA4/T0CK1 VDD VSS 14 5 1 2 0.1uF C35 1 2 0.1uF 10% D11 K A RB0/INT RB1 RB2 RB3 RB4 RB5 RB6 RB7 6 7 8 9 10 11 12 13 R82 75.0 Ω 10uF C37 1 2 PMA0 PMA1 PMA2 10uF SOCKET 18-PIN DIP SU18 R83 75.0 Ω C14 1 2 Vcc_PSM 10uF C15 1 2 D12 A K R84 R77 301 Ω 75.0 Ω PWRFAIL ERROR D9 K A 1N4148 FPLED1 FPLED2 D10 K A 1N4148 Vcc_PSM DEBUG Plus15V +RAW 2-8D 2-8D 1 2 J11 +15V +RAW 3LCD DEBUG/TEST 3-6D 3-6D Base Board Schematic: Power Supply Monitor (version 62165.000.06) Sheet 3 of 4
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Operating Manual OPTIMOD 8685 Surro
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IMPORTANT SAFETY INSTRUCTIONS All t
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Manual PLEASE READ BEFORE PROCEEDIN
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Operating Manual OPTIMOD 8685 Surro
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LIMITED WARRANTY...................
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Advanced Two-Band Controls ........
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CIRCUIT DESCRIPTION................
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Function Description Drawing Page H
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C CALM Act 1- · 3 CBS Loudness Lev
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dual-mono mode 2- · 34 dull sound
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Reassembling 4- · 7 LCD display 6-
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DSP board 6- · 22 Encoder board 6-
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Resetting 8585 2- · 44 resolution
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Changing via terminal program 2- ·
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OPTIMOD SURROUND PROCESSOR INTRODUC
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2-2 INSTALLATION ORBAN MODEL 8685 C
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2-4 INSTALLATION ORBAN MODEL 8685 P
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2-6 INSTALLATION ORBAN MODEL 8685 A
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2-8 INSTALLATION ORBAN MODEL 8685
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OPTIMOD SURROUND PROCESSOR OPERATIO
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OPTIMOD SURROUND PROCESSOR MAINTENA
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OPTIMOD MAINTENANCE 4-3 F) Disconne
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OPTIMOD MAINTENANCE 4-5 11. Removin
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OPTIMOD MAINTENANCE 4-7 18. Replaci
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OPTIMOD MAINTENANCE 4-9 most freque
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OPTIMOD MAINTENANCE 4-11 Test Proce
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OPTIMOD MAINTENANCE 4-13 D) LOCATE
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OPTIMOD MAINTENANCE 4-15 SMPTE Rise
Page 246 and 247: 5-2 TROUBLESHOOTING ORBAN MODEL 868
Page 258 and 259: 6-2 TECHNICAL DATA ORBAN MODEL 8685
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Page 302 and 303: +3.3 VDC 5 2 MECC4 3 4 MECC6 6 MECC
Page 304 and 305: +5 VDC 5 5 +2.5 VDC 4 4 34 42 43 48
Page 306 and 307: From Base Board 1 2 3 4 5 N/C 6 N/C
Page 308 and 309: +5V_PS1 CR1 SMAJ5.0CA +5V_PS2 CR2 S
Page 316 and 317: + C703 10UF C725 0.1UF POWER SUPPLY
Page 318 and 319: DSP CONTROL INTERFACE 62375.000.01.
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Page 328 and 329: J2 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Page 330 and 331: From Interface Board J2 Pin 4 is au
Page 334 and 335: GND 1 +5VD 4 VCC GND 2 IC201 /TOVER
Page 340 and 341: J300A BNC DUAL with CAPACITOR UPPER
Page 342 and 343: IN-CIRCUIT SERIAL PROGRAMMING INTER
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+5VD Y902 1 2 DGND1 +3.3V_CLK 25.00
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+2.5V DGND +2.5V DGND +2.5V DGND +2
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+2.5V DGND_CLNR + C1300 47uF/10V +1
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6-96 TECHNICAL DATA ORBAN MODEL 868
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6-98 TECHNICAL DATA ORBAN MODEL 868
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RS485-SDI INTERFACE DGND J200 2 4 6
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Optimod-Surround 8685 V1.0 Operating Manual - Orban

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