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Carbon Cortex-A15 Model User Guide for SoC Designer

Carbon Cortex-A15 Model User Guide for SoC Designer

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1-8 Using the <strong>Model</strong> Kit Component in <strong>SoC</strong> <strong>Designer</strong> PlusTable 1-3 ESL Component Ports (Continued)ESL Port Description Direction TypePMUEVENTn PMU event bus where n is the core number (0 to 3). Output Signal MasterCPUCLKOFF[n:0] Available only with silicon version r3p1. Individual processorclock disable where n is the processor number (0to 3).0 — Processor clock is enabled. This is the default.1 — Processor clock is stopped.Input Signal Slave1. For these interrupt ports, the active high/low setting is controlled by the negLogic component parameter.The default is active high.2. Size is based on the number of configured cores.All pins that are not listed in this table have been either tied or disconnected <strong>for</strong> per<strong>for</strong>mancereasons.Note:Some ESL component port values can be set using a component parameter. Thisincludes the ACLKENM, ACLKENS, and PCLKENDBG ports. In those cases, theparameter value will be used whenever the ESL port is not connected. If the portis connected, the connection value takes precedence over the parameter value.<strong>Carbon</strong> Design Systems, Inc. Confidential

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