Carbon Cortex-A15 Model User Guide for SoC Designer

1-26 Using the Model Kit Component in SoC Designer PlusTable 1-18 VGIC VCPU Virtual Machine Registers (Continued)Name Description AccessGICV_ABPR VM Aliased Binary Point Register Read-WriteGICV_AIAR VM Aliased Interrupt Acknowledge Register Read-OnlyGICV_AHPPIR VM Aliased Highest Priority Pending InterruptRegisterRead-OnlyGICV_APR0 VM Active Priority Register Read-Only 1GICV_IIDR VM Cpu Interface Identification Register Read-Only1. See GICC_APR0 or GICH_APR0 to write this register.1.5.1.15 VGIC VCPU Hypervisor viewThis group contains VCPU Hypervisor registers.Table 1-19 VGIC VCPU Hypervisor RegistersName Description AccessGICH_HCR Hypervisor Control Register Read-WriteGICH_VTR VGIC Type Register Read-OnlyGICH_VMCR Virtual Machine Control Register Read-WriteGICH_MISR Maintenance Interface Status Register Read-OnlyGICH_EISRn End of Interrupt Statu Registers Read-OnlyGICH_ELRSRn Empty List Register Status Registers Read-OnlyGICH_APR Active Priorities Register Read-WriteGICH_LRn List Registers Read-WriteCarbon Design Systems, Inc. Confidential