Carbon Cortex-A15 Model User Guide for SoC Designer

1-14 Using the Model Kit Component in SoC Designer PlusTable 1-6 ID Registers (Continued)Name Description AccessTCMTR TCM Type Read-OnlyTLBTR TLB Type Read-OnlyMPIDR Multiprocessor Affinity Read-OnlyID_PFR0 Processor Feature 0 Read-OnlyID_PFR1 Processor Feature 1 Read-OnlyID_DFR0 Debug Feature 0 Read-OnlyID_AFR0 Auxiliary Feature 0 Read-OnlyID_MMFR0 Memory Model Feature 0 Read-OnlyID_MMFR1 Memory Model Feature 1 Read-OnlyID_MMFR2 Memory Model Feature 2 Read-OnlyID_MMFR3 Memory Model Feature 3 Read-OnlyID_ISAR0 Instruction Set Attribute Register 0 Read-OnlyID_ISAR1 Instruction Set Attribute Register 1 Read-OnlyID_ISAR2 Instruction Set Attribute Register 2 Read-OnlyID_ISAR3 Instruction Set Attribute Register 3 Read-OnlyID_ISAR4 Instruction Set Attribute Register 4 Read-OnlyID_ISAR5 Instruction Set Attribute Register 5 Read-OnlyID_ISAR6 Instruction Set Attribute Register 6 Read-OnlyID_ISAR7 Instruction Set Attribute Register 7 Read-OnlyCCSIDR Cache Size Identification Read/WriteCLIDR Cache Level ID Read/WriteAIDR AIDR Read-OnlyCSSELR Cache Size Select Register Read/Write1.5.1.3 Control RegistersThe Control group contains registers that dynamically configure the processor.Table 1-7 Control RegistersName Description AccessSCTLR System Control Read/WriteACTLR Auxiliary Control Read/WriteACTLR2 1 Auxiliary Control Register 2 Read/WriteCPACR Coprocessor Access Control Read/WriteNSACR Nonsecure Access Control Read/WriteCarbon Design Systems, Inc. Confidential