11.07.2015 Views

Intel 631xESB/632xESB I/O Controller Hub - Viglen Download

Intel 631xESB/632xESB I/O Controller Hub - Viglen Download

Intel 631xESB/632xESB I/O Controller Hub - Viglen Download

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

21.9.7 TCO1_CNT – TCO1 Control Register...................................................... 72621.9.8 TCO2_CNT – TCO2 Control Register...................................................... 72721.9.9 TCO_MESSAGE1 and TCO_MESSAGE2 Registers..................................... 72721.9.10 TCO_WDCNT – TCO Watchdog Control Register...................................... 72721.9.11 SW_IRQ_GEN – Software IRQ Generation Register .................................72821.9.12 TCO_TMR – TCO Timer Initial Value Register ......................................... 72821.10 General Purpose I/O Registers (D31:F0) ............................................................. 72821.10.1 GPIO Register I/O Address Map ........................................................... 72821.10.2 GPIO_USE_SEL – GPIO Use Select Register ........................................... 72921.10.3 GP_IO_SEL – GPIO Input/Output Select Register.................................... 72921.10.4 GP_LVL – GPIO Level for Input or Output Register.................................. 73021.10.5 GPO_BLINK – GPO Blink Enable Register ............................................... 73121.10.6 GPI_INV – GPIO Signal Invert Register ................................................. 73121.10.7 GPIO_USE_SEL2 – GPIO Use Select 2 Register[63:32] ............................ 73221.10.8 GP_IO_SEL2 – GPIO Input/Output Select 2 Register[63:32] .................... 73321.10.9 GP_LVL2 – GPIO Level for Input or Output 2 Register[63:32]................... 73322 IDE <strong>Controller</strong> Registers (D31:F1).......................................................................... 73522.1 PCI Configuration Registers (IDE – D31:F1) ........................................................ 73522.1.1 VID – Vendor Identification Register (IDE – D31:F1)............................... 73622.1.2 DID – Device Identification Register (IDE – D31:F1) ............................... 73622.1.3 PCICMD – PCI Command Register (IDE – D31:F1) .................................. 73622.1.4 PCISTS – PCI Status Register (IDE – D31:F1) ........................................ 73722.1.5 RID – Revision Identification Register (IDE – D31:F1) .............................73722.1.6 PI – Programming Interface Register (IDE – D31:F1).............................. 73722.1.7 SCC – Sub Class Code Register (IDE – D31:F1)...................................... 73822.1.8 BCC – Base Class Code Register (IDE – D31:F1) .................................... 73822.1.9 CLS – Cache Line Size Register (IDE – D31:F1)...................................... 73822.1.10 PMLT – Primary Master Latency Timer Register(IDE – D31:F1)..................................................................................73822.1.11 PCMD_BAR – Primary Command Block Base AddressRegister (IDE – D31:F1) ..................................................................... 73922.1.12 PCNL_BAR – Primary Control Block Base AddressRegister (IDE – D31:F1) ..................................................................... 73922.1.13 SCMD_BAR – Secondary Command Block Base AddressRegister (IDE D31:F1) ........................................................................ 73922.1.14 SCNL_BAR – Secondary Control Block Base AddressRegister (IDE D31:F1) ........................................................................ 73922.1.15 BM_BASE – Bus Master Base Address Register(IDE – D31:F1)..................................................................................74022.1.16 IDE_SVID – Subsystem Vendor Identification(IDE – D31:F1)..................................................................................74022.1.17 IDE_SID – Subsystem Identification Register(IDE – D31:F1)..................................................................................74022.1.18 INTR_LN – Interrupt Line Register (IDE – D31:F1) .................................74122.1.19 INTR_PN – Interrupt Pin Register (IDE – D31:F1)................................... 74122.1.20 IDE_TIMP – IDE Primary Timing Register (IDE – D31:F1) ........................ 74122.1.21 IDE_TIMS – IDE Secondary Timing Register(IDE – D31:F1)..................................................................................74222.1.22 SLV_IDETIM – Slave (Drive 1) IDE Timing Register(IDE – D31:F1)..................................................................................74322.1.23 SDMA_CNT – Synchronous DMA Control Register(IDE – D31:F1)..................................................................................74322.1.24 SDMA_TIM – Synchronous DMA Timing Register(IDE – D31:F1)..................................................................................74322.1.25 IDE_CONFIG – IDE I/O Configuration Register(IDE – D31:F1)..................................................................................74422.1.26 ATC – APM Trapping Control Register (IDE – D31:F1) .............................74522 <strong>Intel</strong> ® <strong>631xESB</strong>/<strong>632xESB</strong> I/O <strong>Controller</strong> <strong>Hub</strong> Datasheet

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!