Intel 631xESB/632xESB I/O Controller Hub - Viglen Download

2-17 USB Interface Signals.........................................................................................672-18 AC ‘97 Link Signals ............................................................................................682-19 Processor Interface Signals .................................................................................682-20 SMBus Interface Signals .....................................................................................702-21 Power Management Interface Signals ...................................................................702-22 System Management Interface Signals .................................................................712-23 Flash and EEPROM Interface Signals.....................................................................722-24 Expansion Bus Interface .....................................................................................722-25 RS-232 Interface ...............................................................................................732-26 Real Time Clock Interface ...................................................................................732-27 JTAG Interface Signals .......................................................................................742-28 Other Clocks .....................................................................................................742-29 General Purpose I/O Signals................................................................................742-30 Miscellaneous Signals .........................................................................................762-31 Power and Ground Signals ..................................................................................772-32 Functional Strap Definitions.................................................................................792-33 Intel ® 631xESB/632xESB I/O Controller Hub Revision and Device ID Table ...............823-1 Intel ® 631xESB/632xESB I/O Controller Hub and System Clock Domains ..................854-1 Integrated Pull-Up and Pull-Down Resistors ...........................................................874-2 IDE Series Termination Resistors .........................................................................914-3 Power Plane and States for Output and I/O Signals for Intel ® 631xESB/632xESB I/OController Hub...................................................................................................914-4 Power Plane for Input Signals for Intel ® 631xESB/632xESB I/O Controller Hub ..........975-1 Strap Values for Each Configuration ...................................................................1025-2 M66EN, PCIXCAP, And PX133EN Pin Encoding Table ............................................. 1065-3 PCI-X* Initialization Pattern Driven by Intel ® 631xESB/632xESB I/O Controller Hub.1065-4 PCI Transactions Supported .............................................................................. 1075-5 PCI-X* Transactions Supported ......................................................................... 1075-6 Standard Hot-Plug Controller Modes ...................................................................1095-7 Standard Hot-Plug Controller Mode Determination................................................1105-8 PCI Express* Register Requirements .................................................................. 1175-9 HOT-PLUG SIGNAL TO BIT ASSIGNMENT ............................................................ 1205-10 I/O Expander Address Matrix............................................................................. 1205-11 Intel ® 631xESB/632xESB I/O Controller Hub INTX Routing Table ........................... 1235-12 PCI Express Credit Mapping Table ...................................................................... 1255-13 MSI vs. PCI IRQ Actions.................................................................................... 1255-14 PCI Bridge Initiator Cycle Types......................................................................... 1305-15 Packet Type Initiated as Master ......................................................................... 1365-16 Standard Messages Initiated by the Intel ® 631xESB/632xESB I/O Controller Hub..... 1375-17 Packet Types Supported as Target ..................................................................... 1375-18 Standard Messages accepted by the Intel ® 631xESB/632xESB I/O ControllerHub as Target ................................................................................................. 1385-19 Assignment of Client IDs................................................................................... 1385-20 ARC Memory System Table in Intel ® 631xESB/632xESB I/O Controller Hub MMS ..... 1535-21 Intel ® 631xESB/632xESB I/O Controller Hub BMC SMBus Interface Usage Summary 1575-22 LPC Cycle Types Supported ............................................................................... 1635-23 Start Field Bit Definitions ..................................................................................1635-24 Cycle Type Bit Definitions ................................................................................. 1645-25 Transfer Size Bit Definition................................................................................ 1645-26 SYNC Bit Definition ..........................................................................................1645-27 DMA Channel Priority ....................................................................................... 1685-28 DMA Transfer Size ........................................................................................... 16832 Intel ® 631xESB/632xESB I/O Controller Hub Datasheet