Intel 631xESB/632xESB I/O Controller Hub - Viglen Download

23.1.32 MD – Message Signaled Interrupt Message Data Register(SATA–D31:F2) ................................................................................. 76223.1.33 MAP – Port Mapping Register (SATA–D31:F2) ........................................ 76323.1.34 PCS – Port Control and Status Register (SATA–D31:F2) .......................... 76323.1.35 SATACR0 – Capability Register 0 (SATA–D31:F2) ................................... 76423.1.36 SATACR1 – Capability Register 1 (SATA–D31:F2) ................................... 76523.1.37 ATC – APM Trapping Control Register (SATA–D31:F2) .............................76523.1.38 ATS – APM Trapping Status Register (SATA–D31:F2) .............................. 76523.1.39 SP Scratch Pad Register (SATA–D31:F2) ............................................... 76623.1.40 BFCS – BIST FIS Control/Status Register (SATA–D31:F2)........................ 76623.1.41 BFTD1 – BIST FIS Transmit Data1 Register (SATA–D31:F2)..................... 76723.1.42 BFTD2 – BIST FIS Transmit Data2 Register (SATA–D31:F2)..................... 76723.2 Bus Master IDE I/O Registers (D31:F2)...............................................................76823.2.1 BMIC[P,S] – Bus Master IDE Command Register (D31:F2)....................... 76823.2.2 BMIS[P,S] – Bus Master IDE Status Register (D31:F2) ............................ 76923.2.3 BMID[P,S] – Bus Master IDE Descriptor Table PointerRegister (D31:F2) .............................................................................. 77023.2.4 BMINDEX[P,S] – Bus Master Indirect AHCI Index RegisterRegister (D31:F2) .............................................................................. 77023.2.5 BMDATA[P,S] – Bus Master Indirect AHCI Data RegisterRegister (D31:F2) .............................................................................. 77023.3 AHCI Registers (D31:F2) ..................................................................................77123.3.1 AHCI Generic Host Control Registers (D31:F2) ....................................... 77123.3.2 Port Registers (D31:F2) ...................................................................... 77524 SMBus Controller Registers (D31:F3) ..................................................................... 78924.1 PCI Configuration Registers (SMBUS – D31:F3) ................................................... 78924.1.1 VID – Vendor Identification Register (SMBUS – D31:F3).......................... 78924.1.2 DID – Device Identification Register (SMBUS – D31:F3) .......................... 78924.1.3 PCICMD – PCI Command Register (SMBUS – D31:F3) .............................79024.1.4 PCISTS – PCI Status Register (SMBUS – D31:F3) ................................... 79024.1.5 RID – Revision Identification Register (SMBUS – D31:F3) ........................ 79124.1.6 PI – Programming Interface Register (SMBUS – D31:F3) .........................79124.1.7 SCC – Sub Class Code Register (SMBUS – D31:F3).................................79124.1.8 BCC – Base Class Code Register (SMBUS – D31:F3) ............................... 79124.1.10 SVID – Subsystem Vendor Identification Register(SMBUS – D31:F2/F4) ........................................................................ 79224.1.11 SID – Subsystem Identification Register(SMBUS – D31:F2/F4) ........................................................................ 79224.1.12 INT_LN – Interrupt Line Register (SMBUS – D31:F3) .............................. 79224.1.13 INT_PN – Interrupt Pin Register (SMBUS – D31:F3)................................ 79324.1.14 HOSTC – Host Configuration Register (SMBUS – D31:F3) ........................ 79324.2 SMBus I/O Registers ........................................................................................ 79324.2.1 HST_STS – Host Status Register (SMBUS – D31:F3)............................... 79424.2.2 HST_CNT – Host Control Register (SMBUS – D31:F3) .............................79524.2.3 HST_CMD – Host Command Register (SMBUS – D31:F3).........................79624.2.4 XMIT_SLVA – Transmit Slave Address Register(SMBUS – D31:F3)............................................................................. 79724.2.5 HST_D0 – Host Data 0 Register (SMBUS – D31:F3) ................................ 79724.2.6 HST_D1 – Host Data 1 Register (SMBUS – D31:F3) ................................ 79724.2.7 Host_BLOCK_DB – Host Block Data Byte Register(SMBUS – D31:F3)............................................................................. 79824.2.8 PEC – Packet Error Check (PEC) Register(SMBUS – D31:F3)............................................................................. 79824.2.9 RCV_SLVA – Receive Slave Address Register(SMBUS – D31:F3)............................................................................. 79824.2.10 SLV_DATA – Receive Slave Data Register (SMBUS – D31:F3)................... 79924.2.11 AUX_STS – Auxiliary Status Register (SMBUS – D31:F3) .........................79924 Intel ® 631xESB/632xESB I/O Controller Hub Datasheet